ICS1527G-110LF IDT, Integrated Device Technology Inc, ICS1527G-110LF Datasheet

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ICS1527G-110LF

Manufacturer Part Number
ICS1527G-110LF
Description
IC VIDEO CLK SYNTHESIZER 16TSSOP
Manufacturer
IDT, Integrated Device Technology Inc
Type
Clock/Frequency Synthesizer, Frequency Generatorr
Datasheet

Specifications of ICS1527G-110LF

Pll
Yes with Bypass
Input
LVTTL
Output
LVCMOS
Number Of Circuits
1
Ratio - Input:output
1:1
Differential - Input:output
No/No
Frequency - Max
110MHz
Divider/multiplier
Yes/No
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
16-TSSOP
Frequency-max
110MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
1527G-110LF

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ICS1527G-110LFT
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MDS 1527 G
General Description
The ICS1527 is a low-cost, high-performance
frequency generator. It is suited to general purpose
phase controlled clock synthesis as well as
line-locked and genlocked high-resolution video
applications. Using ICS’s advanced low-voltage
CMOS mixed-mode technology, the ICS1527 is an
effective clock synthesizer that supports video
projectors and displays at resolutions from VGA to
beyond XGA.
The ICS1527 offers single-ended clock outputs to 60
or 110 MHz. The HSYNC_out, and VSYNC_out pins
provide the regenerated versions of the HSYNC and
VSYNC inputs synchronous to the CLK output.
The advanced PLL uses either its internal
programmable feedback divider or an external divider.
The device is programmed by a standard I
serial interface and is available in a TSSOP16
package.
ICS1527 Functional Diagram
HSYNC
VSYNC
I
2
C
EXTFB
ICS1527
External
Divider
identified in this publication without notice. IDT advises its customers
to obtain the latest version of all device data to verify that information
IDT reserves the right to make changes in the preliminary device data
Video Clock Synthesizer
being relied upon is current and accurate.
ICS1527
HSYNC_out
VSYNC_out
CLK
2
C-bus™
Features
• Lead-free packaging (Pb-free)
• Low jitter (typical 27 ps short term jitter)
• LVCMOS single-ended clock outputs
• Uses 3.3 V power supply
• 5 Volt tolerant Inputs (HSYNC, VSYNC)
• Coast (ignore HSYNC) capability via VSYNC pin
• Industry standard I
• PLL Lock detection via I
• 16-pin TSSOP package
Applications
• Frequency synthesis
• LCD monitors, video projectors and plasma displays
• Genlocking multiple video subsystems
Pin Configuration (16-pin TSSOP)
• 60/110 MHz speed grades available
HSYNC
VSYNC
EXTFB
VSSD
VDDA
VSSA
SDA
SCL
2
C-bus programming interface
1
2
3
4
5
6
7
8
2
C or LOCK output pin
16
15
14
13
12
11
10
9
VDDD
VSSQ
VSYNC_out
VDDQ
CLK
HSYNC_out
LOCK
I2CADR
Revision 110905

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ICS1527G-110LF Summary of contents

Page 1

General Description The ICS1527 is a low-cost, high-performance frequency generator suited to general purpose phase controlled clock synthesis as well as line-locked and genlocked high-resolution video applications. Using ICS’s advanced low-voltage CMOS mixed-mode technology, the ICS1527 is an ...

Page 2

ICS1527 Data Sheet Section 1 Overview The ICS1527 is a user-programmable, high-performance general purpose clock generator intended for graphics system line-locked and genlocked applications, and provides the clock signals required by high-performance analog-to-digital converters. Figure 1-1 Simplified Block ...

Page 3

ICS1527 Data Sheet 2 1 Bus Serial Interface The ICS1527 uses a 5 volt tolerant, industry-standard 2 I C-bus serial interface that runs at either low-speed (100 kHz) or high-speed (400 kHz). The interface uses 12 word addresses ...

Page 4

ICS1527 Data Sheet Section 2 Pin Descriptions ICS1527 Table 2-1 Pin Descriptions PIN NO. PIN NAME TYPE 1 VSSD POWER 2 SDA IN/OUT 3 SCL IN 4 VSYNC IN 5 EXTFB IN 6 HSYNC IN 7 VDDA POWER 8 VSSA ...

Page 5

ICS1527 Data Sheet Section 3 Register map summary Word Address Name Access Bit Name 00h Input CPen Control VSYNC_Pol HSYNC_Pol Fbk_Pol Fbk_Sel Reserved EnPLS Reserved 01h Loop ICP0-2 * Control Reserved VCOD0-1 Reserved 02h ...

Page 6

ICS1527 Data Sheet Word Address Name Access Bit Name 07h Reserved Reserved Reserved 08h Reset Write Reserved 09-0Fh Reserved Read Reserved 10h Chip Ver Read Reserved 11h Chip Rev Read Chip Rev 12h Rd_Reg Read Reserved PLL_Lock Reserved *. Written ...

Page 7

ICS1527 Data Sheet Section 4 Programming 2 4.1 Industry-Standard I C Serial Bus: Data Format Figure 4-1 ICS1527 Data Format for I S ingle/m ultiple register w rite (page w rite) D evice address ...

Page 8

ICS1527 Data Sheet Section 5 AC/DC Operating Conditions 5.1 Absolute Maximum Ratings Table 5-1 lists absolute maximum ratings for the ICS1527. Stresses above these ratings can cause permanent damage to the device. These ratings, which are standard values for ICS ...

Page 9

ICS1527 Data Sheet Table 5-4 AC Characteristics Parameter Symbol General VCO Frequency VCO Gain AC Inputs EXTFB Input Frequency f EXTFB Input High Voltage EXTFB Input Low Voltage Analog Input (HSYNC/VSYNC) HSYNC Input Frequency f VSYNC Input Frequency f Input ...

Page 10

ICS1527 Data Sheet Parameter Symbol HSYNC to HSYNC_out propagation delay (with Schmitt-trigger) CLK to HSYNC_out/ VSYNC_out skew Clock and HSYNC_out/VSYNC_out Transition Time - Rise Clock and HSYNC_out/VSYNC_out Transition Time - Fall LOCK Transition Time - Rise LOCK Transition Time - ...

Page 11

ICS1527 Data Sheet Section 6 Package Outline and Package Dimensions 16-pin TSSOP 4.40 mm body, 0.65 mm pitch Package dimensions are kept current with JEDEC Publication No INDEX AREA Section 7 Ordering ...

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