MPC9230EI IDT, Integrated Device Technology Inc, MPC9230EI Datasheet

no-image

MPC9230EI

Manufacturer Part Number
MPC9230EI
Description
IC CLK SYNTH LV PECL 28-PLCC
Manufacturer
IDT, Integrated Device Technology Inc
Type
Clock/Frequency Synthesizerr
Datasheet

Specifications of MPC9230EI

Pll
Yes
Input
Crystal
Output
LVPECL
Number Of Circuits
1
Ratio - Input:output
1:1
Differential - Input:output
No/Yes
Frequency - Max
750MHz
Divider/multiplier
Yes/No
Voltage - Supply
3.135 V ~ 3.465 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
28-PLCC
Frequency-max
800MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MPC9230EI
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
Part Number:
MPC9230EI
Manufacturer:
FREESCALE-PB
Quantity:
690
Part Number:
MPC9230EI
Manufacturer:
IDT
Quantity:
20 000
Part Number:
MPC9230EIR2
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
mance clock generation in mid-range to high-performance telecom, networking and computing
applications. With output frequencies from 50 MHz to 800 MHz
PECL output signals the device meets the needs of the most demanding clock applications.
Features
Functional Description
oscillator is divided by 16 and then multiplied by the PLL. The VCO within the PLL operates over a range of 800 to 1600 MHz.
scaled by a divider that is configured by either the serial or parallel interfaces. The crystal oscillator frequency f
M and the PLL post-divider N determine the output frequency.
Note that for some values of M (either too high or too low) the PLL will not achieve phase lock. The PLL will be stable if the VCO frequency is
within the specified VCO frequency range (800 to 1600 MHz
or 8). This divider extends performance of the part while providing a 50% duty cycle. The output driver is driven differentially from the output
divider, and is capable of driving a pair of transmission lines terminated 50 Ω to V
is separated from the power supply for the core logic and output drivers to minimize noise induced jitter.
the internal counters. It is recommended on system reset to hold the P_LOAD input LOW until power becomes valid. On the LOW-to-HIGH
transition of P_LOAD, the parallel inputs are captured. The parallel interface has priority over the serial interface. Internal pullup resistors are
provided on the M[8:0] and N[1:0] inputs and prevent the LVCMOS compatible control inputs from floating.
input S_DATA must meet setup and hold timing as specified in the AC Characteristics section of this document. The configuration latches will
capture the value of the shift register on the HIGH-to-LOW edge of the S_LOAD input. See the programming section for more information. The
TEST output reflects various internal node values, and is controlled by the T[2:0] bits in the serial data stream. In order to minimize the PLL
jitter, it is recommended to avoid active signal on the TEST output.
1. The VCO frequency range of 800–1600 MHz is available at an ambient temperature range of 0 to 70°C. At –40 to +85°C, the VCO frequency (output
MPC9230 REVISION 8 MARCH 29, 2010
frequency) is limited to max. 1500 MHz (750 MHz).
The MPC9230 is a 3.3 V compatible, PLL based clock synthesizer targeted for high perfor-
The internal crystal oscillator uses the external quartz crystal as the basis of its frequency reference. The frequency of the internal crystal
The feedback path of the PLL is internal. The PLL adjusts the VCO output frequency to be M/4 times the external input reference frequency.
The PLL post-divider N is configured through either the serial or the parallel interfaces, and can provide one of four division ratios (1, 2, 4,
The configuration logic has two sections: serial and parallel. The parallel interface uses the values at the M[8:0] and N[1:0] inputs to configure
The serial interface centers on a fourteen bit shift register. The shift register shifts once per rising edge of the S_CLOCK input. The serial
50 MHz to 800 MHz
Differential PECL output
LVCMOS compatible control inputs
On-chip crystal oscillator for reference frequency generation
Alternative LVCMOS compatible reference clock input
3.3 V power supply
Fully integrated PLL
Minimal frequency overshoot
Serial 3-wire programming interface
Parallel programming interface for power-up
32-lead LQFP and 28-lead PLCC packaging
32-lead and 28-lead Pb-free package available
SiGe Technology
Ambient temperature range -40°C to +85°C
Pin and function compatible to the MC12430
(1)
synthesized clock output signal
800MHz Low Voltage PECL Clock Synthesizer
(1)
(1)
). The M-value must be programmed by the serial or parallel interface.
and the support of differential
1
CC
– 2.0 V. The positive supply voltage for the internal PLL
800 MHz LOW VOLTAGE
©2010 Integrated Device Technology, Inc.
CLOCK SYNTHESIZER
XTAL
MPC9230
, the PLL feedback-divider
28-LEAD PLCC PACKAGE
28-LEAD PLCC PACKAGE
32-LEAD LQFP PACKAGE
32-LEAD LQFP PACKAGE
Pb-FREE PACKAGE
Pb-FREE PACKAGE
CASE 873A-04
CASE 873A-04
CASE 776-02
CASE 776-02
AC SUFFIX
FN SUFFIX
FA SUFFIX
DATA SHEET
EI SUFFIX
MPC9230
(1)
Its output is

Related parts for MPC9230EI

MPC9230EI Summary of contents

Page 1

Low Voltage PECL Clock Synthesizer The MPC9230 is a 3.3 V compatible, PLL based clock synthesizer targeted for high perfor- mance clock generation in mid-range to high-performance telecom, networking and computing applications. With output frequencies from 50 MHz to ...

Page 2

MPC9230 Data Sheet XTAL_IN XTAL XTAL_OUT 10 – FREF_EXT V CC XTAL_SEL P_LOAD S_LOAD P/S S_DATA S_CLOCK M[0:8] N[1: S_CLOCK 26 S_DATA 27 S_LOAD MPC9230 CC_PLL FREF_EXT 2 ...

Page 3

MPC9230 Data Sheet Table 1. Pin Configurations Pin I/O Default XTAL_IN, XTAL_OUT FREF_EXT Input Output OUT OUT TEST Output XTAL_SEL Input 1 S_LOAD Input 0 P_LOAD Input 1 S_DATA Input 0 S_CLOCK Input 0 M[0:8] Input ...

Page 4

MPC9230 Data Sheet Table 4. General Specifications Symbol Characteristics V Output Termination Voltage TT MM ESD Protection (Machine Model) HBM ESD Protection (Human Body Model) LU Latch-Up Immunity C Input Capacitance IN θ LQFP 32 Thermal Resistance Junction to Ambient ...

Page 5

MPC9230 Data Sheet Table 7. AC Characteristics (V = 3.3 V ± 5 Symbol Characteristics LVCMOS Control Inputs (FREF_EXT, XTAL_SEL, P_LOAD, S_LOAD, S_DATA, S_CLOCK, M[0:8], N[0:1]. OE) V Input High Voltage IH V Input Low Voltage IL (1) ...

Page 6

MPC9230 Data Sheet Table 8. AC Characteristics (V = 3.3 V ± 5 Symbol Characteristics f Crystal Interface Frequency Range XTAL f FREF_EXT Reference Frequency Range REF (3) f VCO Frequency Range VCO f Output Frequency MAX f ...

Page 7

MPC9230 Data Sheet Table 9. AC Characteristics (V = 3.3 V ± 5 Symbol Characteristics f Crystal Interface Frequency Range XTAL f FREF_EXT Reference Frequency Range REF (3) f VCO Frequency Range VCO f Output Frequency MAX f ...

Page 8

MPC9230 Data Sheet Programming the MPC9230 Programming the MPC9230 amounts to properly configuring the internal PLL dividers to produce the desired synthesized frequency at the output. The output frequency can be represented by this formula: ÷ 16) ⋅ (4 ⋅ ...

Page 9

MPC9230 Data Sheet Substituting N for the four available values for N ( yields: Table 11. Output Frequency Range for f N Output Frequency F OUT Range for 1 0 Value T = 0°C to 70°C A ...

Page 10

MPC9230 Data Sheet S_CLOCK S_DATA S_LOAD M[8: N[1:0] P_LOAD Power Supply Filtering The MPC9230 is a mixed analog/digital product. Its analog circuitry is naturally susceptible to random noise, especially if this noise is seen on the power supply ...

Page 11

MPC9230 Data Sheet and bypass schemes discussed in this section should be adequate to eliminate power supply noise related problems in most designs XTAL Figure 6. PCB Board Layout Recommendation for the PLCC28 Package Using the ...

Page 12

MPC9230 Data Sheet -N- - 0.010 (0.250) T L-M S NOTES: 1. DATUMS -L-, -M-, AND -N- DETERMINED WHERE TOP OF LEAD SHOULDER EXISTS PLASTIC BODY AT MOLD PARTING LINE. 2. DIMENSION G1, TRUE ...

Page 13

MPC9230 Data Sheet MPC9230 REVISION 8 MARCH 29, 2010 PACKAGE DIMENSIONS CASE 873A-04 ISSUE C 32-LEAD LQFP PACKAGE 13 800MHZ LOW VOLTAGE PECL CLOCK SYNTHESIZER PAGE ©2010 Integrated Device Technology, Inc. ...

Page 14

MPC9230 Data Sheet MPC9230 REVISION 8 MARCH 29, 2010 PACKAGE DIMENSIONS CASE 873A-04 ISSUE C 32-LEAD LQFP PACKAGE 14 800MHZ LOW VOLTAGE PECL CLOCK SYNTHESIZER PAGE ©2010 Integrated Device Technology, Inc. ...

Page 15

MPC9230 Data Sheet MPC9230 REVISION 8 MARCH 29, 2010 PACKAGE DIMENSIONS CASE 873A-04 ISSUE C 32-LEAD LQFP PACKAGE 15 800MHZ LOW VOLTAGE PECL CLOCK SYNTHESIZER PAGE ©2010 Integrated Device Technology, Inc. ...

Page 16

MPC9230 Data Sheet 6024 Silver Creek Valley Road Sales 800-345-7015 (inside USA) San Jose, California 95138 +408-284-8200 (outside USA) Fax: 408-284-2775 www.IDT.com/go/contactIDT DISCLAIMER Integrated Device Technology, Inc. (IDT) and its subsidiaries reserve the right to modify the products and/or specifications ...

Related keywords