STW81101AT STMicroelectronics, STW81101AT Datasheet - Page 14

• Manufacturer Part Number: STW81101AT
• Description: IC SYNTHESIZER MULTI RF 28VFQFPN
• Manufacturer: STMicroelectronics
• Type: Frequency Synthesizer (RF)r

Specifications of STW81101AT

• Pll: Yes
• Input: Clock, Crystal
• Output: Clock, Crystal
• Number Of Circuits: 1
• Ratio - Input:output: 3:2
• Differential - Input:output: No/No
• Frequency - Max: 4.4GHz
• Divider/multiplier: Yes/No
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 28-VFQFN, 28-VFQFPN
• Frequency-max: 4.4GHz
• Number Of Elements: 1
• Pll Input Freq (min): 10MHz
• Pll Input Freq (max): 200MHz
• Operating Supply Voltage (typ): 3.3V
• Operating Temp Range: -40C to 85C
• Package Type: VFQFPN
• Operating Supply Voltage (min): 3V
• Operating Supply Voltage (max): 3.6V
• Operating Temperature Classification: Industrial
• Pin Count: 28
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Electrical specifications
Table 6.
1. Phase noise SSB.
2. Normalized PN = Measured PN – 20log(N) – 10log(F
3. Typical Phase Noise at centre band frequency
14/53
VCO A with divider by 2 (1650 MHz-1950 MHz) – open loop
Phase noise @ 1 kHz
Phase noise @ 10 kHz
Phase noise @ 100 kHz
Phase noise @ 1 MHz
Phase noise @ 10 MHz
Phase noise floor @ 40 MHz
VCO B with divider by 2 (1900 MHz-2200 MHz) – open loop
Phase noise @ 1 kHz
Phase noise @ 10 kHz
Phase noise @ 100 kHz
Phase noise @ 1 MHz
Phase noise @ 10 MHz
Phase noise floor @ 40 MHz
VCO A with divider by 4 (825 MHz-975 MHz) – open loop
Phase noise @ 1 kHz
Phase noise @ 10 kHz
Phase noise @ 100 kHz
Phase noise @ 1 MHz
Phase noise @ 10 MHz
Phase noise floor @ 40 MHz
VCO B with divider by 4 (950 MHz-1100 MHz) – open loop
Phase noise @ 1 kHz
Phase noise @ 10 kHz
Phase noise @ 100 kHz
Phase noise @ 1 MHz
Phase noise @ 10 MHz
Phase noise floor @ 40 MHz
VCO amplitude setting to value [11].
All the closed-loop performances are specified using a reference clock signal at 76.8 MHz with phase noise of
-135 dBc/Hz @1 kHz offset, -145 dBc/Hz @10 kHz offset and -149.5 dBc/Hz of noise floor.
comparison frequency at the PFD input
Parameter
Phase noise specification (continued)
An evaluation kit is available upon request, including a powerful simulation tool
(STWPLLSim) that allows a very accurate estimation of the device’s phase noise according
to the desired project parameters (VCO frequency, selected output stage, reference clock,
frequency step, and so on); refer to
Test conditions
PFD
) where N is the VCO divider ratio (N=B*P+A) and F
Chapter 8: Application information
(3)
(3)
(3)
(3)
Min
-151.5
-151.5
-112
-135
-155
-112
-134
-155
-118
-141
-154
-155
-118
-140
-154
-155
Typ
-62
-89
-61
-89
-68
-95
-67
-95
for more details.
Max
PFD
STW81101
is the
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Unit