ISL12022MIBZ-T Intersil, ISL12022MIBZ-T Datasheet

no-image

ISL12022MIBZ-T

Manufacturer Part Number
ISL12022MIBZ-T
Description
IC RTC/CALENDAR TEMP SENS 20SOIC
Manufacturer
Intersil
Type
Clock/Calendarr
Datasheet

Specifications of ISL12022MIBZ-T

Memory Size
128B
Time Format
HH:MM:SS (12/24 hr)
Date Format
YY-MM-DD-dd
Interface
I²C, 2-Wire Serial
Voltage - Supply
2.7 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
20-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
ISL12022MIBZ-TCT

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ISL12022MIBZ-T
Manufacturer:
INTERSIL
Quantity:
20 000
Part Number:
ISL12022MIBZ-TR5421
Manufacturer:
INTERSIL
Quantity:
20 000
BATTERY
3.0V
Low Power RTC with Battery Backed SRAM,
Integrated ±5ppm Temperature Compensation and
Auto Daylight Saving
ISL12022M
The ISL12022M device is a low power real time clock
(RTC) with an embedded temperature sensor and
crystal. Device functions include oscillator compensation,
clock/calendar, power fail and low battery monitors,
brownout indicator, one-time, periodic or polled alarms,
intelligent battery backup switching, Battery Reseal™
function and 128 bytes of battery-backed user SRAM.
The device is offered in a 20 Ld SOIC module that
contains the RTC and an embedded 32.768kHz quartz
crystal. The calibrated oscillator provides less than
±5ppm drift over the full -40°C to +85°C temperature
range.
The RTC tracks time with separate registers for hours,
minutes, and seconds. The calendar registers track date,
month, year and day of the week and are accurate
through 2099, with automatic leap year correction.
Daylight Savings time adjustment is done automatically,
using parameters entered by the user. Power fail and
battery monitors offer user-selectable trip levels. The
time stamp function records the time and date of
switchover from V
to V
Related Literature*
• See
Typical Application Circuit
June 4, 2010
FN6668.7
Clock Applications”
DD
SCHOTTKY DIODE
AN1549
BAT54
power.
0.1µF
C2
“Addressing Power Issues in Real Time
10
1
2
3
4
5
6
7
8
9
DD
NC
NC
NC
NC
NC
GND
VBAT
GND
NC
NC
ISL12022M
to V
IRQ/FOUT 13
GND 15
VDD 14
SDA 11
SCL 12
BAT
NC 20
NC 19
NC 18
NC 17
NC 16
1
power, and also from V
0.1µF
C1
(see page 30)
3.3V
R1
10k
IRQ/FOUT
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
R2
10k
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
R3
10k
VDD
SCL
SDA
GND
INTERFACE
BAT
MCU
Features
• Embedded 32.768kHz Quartz Crystal in the Package
• 20 Ld SOIC Package (for DFN version, refer to the
• Calendar
• On-chip Oscillator Temperature Compensation
• 10-bit Digital Temperature Sensor Output
• 15 Selectable Frequency Outputs
• Interrupt for Alarm or 15 Selectable Frequency
• Automatic Backup to Battery or Supercapacitor
• VDD and Battery Status Monitors
• Battery Reseal™ Function to Extend Battery Shelf
• Power Status Brownout Monitor
• Time Stamp for Battery Switchover
• 128 Bytes Battery-Backed User SRAM
• I
• RoHS Compliant
Applications*
• Utility Meters
• POS Equipment
• Printers and Copiers
• Digital Cameras
Performance Curve
ISL12020M)
Outputs
Life
All other trademarks mentioned are the property of their respective owners.
2
I
C-Bus™
2
C Bus is a registered trademark owned by NXP Semiconductors Netherlands, B.V.
Copyright Intersil Americas Inc. 2008, 2009, 2010. All Rights Reserved.
-1
-2
-3
-4
-5
5
4
3
2
1
0
-40
OSCILLATOR ERROR vs TEMPERATURE
-20
V
BAT
0
= 5.5V
TEMPERATURE (°C)
(see page 30)
V
DD
20
= 3.3V
40
V
DD
60
= 2.7V
80

Related parts for ISL12022MIBZ-T

ISL12022MIBZ-T Summary of contents

Page 1

... IRQ/FOUT -40 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design registered trademark of Intersil Americas Inc Bus is a registered trademark owned by NXP Semiconductors Netherlands, B.V. Copyright Intersil Americas Inc. 2008, 2009, 2010. All Rights Reserved. ...

Page 2

Block Diagram SDA SDA BUFFER SCL SCL BUFFER CRYSTAL OSCILLATOR TRIP + - V BAT GND Pin Configuration Pin Descriptions PIN NUMBER SYMBOL Connection. Do not connect to a signal ...

Page 3

... PART NUMBER (Note 3) MARKING ISL12022MIBZ (Note 2) ISL12022MIBZ ISL12022MIBZ-T (Notes 1, 2) ISL12022MIBZ 1. Please refer to TB347 for details on reel specifications. 2. These Intersil plastic packaged products employ special material sets, molding compounds and 100% matte tin plate plus anneal (e3) termination finish. These products do contain Pb but they are RoHS compliant by exemption 7 (lead in high melt temp solder for internal connections) and exemption 5 (lead in piezoelectric elements) ...

Page 4

Table of Contents Typical Application Circuit ................................. 1 Performance Curve ............................................ 1 Block Diagram ................................................... 2 Pin Descriptions ................................................ 2 Absolute Maximum Ratings .............................. 5 Thermal Information ........................................ 5 Electrical Specifications .................................... Interface Specifications .............................. 6 ...

Page 5

... Thermal Resistance (Typical) 20 Lead SOIC (Notes 4, 5) Storage Temperature . . . . . . . . . . . . . . . -40°C to +85°C + 0.3V DD Pb-Free Reflow Profile (Note .see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp Test Conditions +2.7 to +5.5V stated. Boldface limits apply over the operating temperature range, -40°C to +85°C. CONDITIONS (Note 15) ...

Page 6

DC Operating Characteristics RTC SYMBOL PARAMETER IRQ/F (OPEN DRAIN OUTPUT) OUT V Output Low Voltage OL Power-Down Timing Test Conditions: V stated. SYMBOL PARAMETER V V Negative Slew Rate DDSR Interface Specifications SYMBOL PARAMETER V SDA ...

Page 7

I C Interface Specifications SYMBOL PARAMETER t START Condition Hold Time HD:STA t Input Data Setup Time SU:DAT t Input Data Hold Time HD:DAT t STOP Condition Setup Time SU:STO t STOP Condition Hold Time HD:STO t Output Data ...

Page 8

SDA vs SCL Timing t F SCL t SU:STA t HD:STA SDA (INPUT TIMING) SDA (OUTPUT TIMING) EQUIVALENT AC OUTPUT LOAD CIRCUIT FOR V 5.0V 1533Ω SDA AND IRQ/F OUT 100pF FIGURE 1. STANDARD OUTPUT LOAD FOR TESTING THE DEVICE ...

Page 9

Typical Performance Curves 1050 1000 950 900 850 800 1.8 2.3 2.8 3.3 3.8 V VOLTAGE (V) BAT FIGURE BAT BAT 5. 3. -40 -20 ...

Page 10

Typical Performance Curves 5.5 5 32kHz OUT 4.5 4.0 3.5 F OUT 3.0 2.5 -40 - TEMPERATURE (°C) FIGURE TEMPERATURE, 3 DIFFERENT F DD 110 100 V = 5.5V BAT ...

Page 11

... Functional Description Power Control Operation The power control circuit accepts a V input. Many types of batteries can be used with Intersil RTC products. For example, 3.0V or 3.6V Lithium batteries are appropriate, and battery sizes are available that can power the ISL12022M for years. ...

Page 12

These registers will hold the original power-down value until they are cleared by setting CLRTS = 1 to clear the registers. The normal power switching of the ISL12022M is designed to switch into battery backup ...

Page 13

Time Stamp for V Status (5 bytes): Address 1Bh DD to 1Fh. 6. Day Light Saving Time (8 bytes): 20h to 27h. 7. TEMP (2 bytes): 28h to 29h. 8. Crystal Net PPM Correction, NPPM (2 bytes): 2Ah, 2Bh ...

Page 14

TABLE 1. REGISTER MEMORY MAP (YELLOW SHADING INDICATES READ-ONLY BITS) (Continued) REG ADDR. SECTION NAME 7 16h VSC 0 17h VMN 0 TSV2B 18h VHR VMIL 19h VDT 0 1Ah VMO 0 1Bh BSC 0 1Ch BMN 0 TSB2V 1Dh ...

Page 15

Control and Status Registers (CSR) Addresses [07h to 0Fh] The Control and Status Registers consist of the Status Register, Interrupt and Alarm Register, Analog Trimming and Digital Trimming Registers. STATUS REGISTER (SR) The Status Register is located in the memory ...

Page 16

Example - When the LBAT75 is Set to “1” in Battery Mode: The minute register changes to 30h when the device is in battery mode, the LBAT75 is set to “1” the next time the device switches back to Normal ...

Page 17

Power Supply Control Register (PWR_VDD) CLEAR TIME STAMP BIT (CLRTS) ADDR 09h CLRTS This bit clears Time Stamp V to Battery (TSV2B) and DD Time Stamp Battery to V ...

Page 18

... If an application requires adjustment of the IATR bits outside the preset values, the user should contact Intersil. AGING AND INITIAL TRIM DIGITAL TRIMMING BITS (IDTR0<1:0>) These bits allow ±30.5ppm initial trimming range for the crystal frequency. This is meant coarse adjustment if the range needed is outside that of the IATR control ...

Page 19

ALPHA Register (ALPHA) TABLE 13. ALPHA REGISTER ADD 0Ch D ALPHA6 ALPHA5 ALPHA4 ALPHA3 ALPHA2 ALPHA1 ALPHA0 The ALPHA variable is 8 bits and is defined as the temperature coefficient of crystal from -40°C ...

Page 20

AT(max ppm ( 00H) and OUT AT(min ppm ( 3FH). OUT The BETA VALUES result is indexed in the right hand column and the resulting Beta factor (for the register) ...

Page 21

Any one alarm register, multiple registers, or all registers can be enabled for a match. There are two alarm operation modes: Single Event and periodic Interrupt Mode: • Single Event Mode is enabled by setting the bit 7 on ...

Page 22

DST Control Registers (DSTCR) 8 bytes of control registers have been assigned for the Daylight Savings Time (DST) functions. DST beginning (set Forward) time is controlled by the registers DstMoFd, DstDwFd, DstDtFd, and DstHrFd. DST ending time (set Backward or ...

Page 23

DST Day/Week Reverse DstDwRv contains both the Day of the Week and the Week of the Month data for DST Reverse control. DST can be controlled either by actual date or by setting both the Week of the month and ...

Page 24

TABLE 24. XT0 VALUES XT<4:0> 01111 01110 01101 01100 01011 01010 01001 01000 00111 00110 00101 00100 00011 00010 00001 00000 10000 10001 10010 10011 10100 10101 10110 10111 11000 11001 11010 11011 11100 11101 11110 11111 ALPHA Hot Register ...

Page 25

SCL SDA START FIGURE 15. VALID DATA CHANGES, START AND STOP CONDITIONS SCL FROM MASTER SDA OUTPUT FROM TRANSMITTER SDA OUTPUT FROM RECEIVER START FIGURE 16. ACKNOWLEDGE RESPONSE FROM RECEIVER SIGNALS FROM THE MASTER SIGNAL AT SDA SIGNALS FROM THE ...

Page 26

For a random read of the Control/Status Registers, the slave byte must be “1101111x” in both places ...

Page 27

S SIGNALS T IDENTIFICATION FROM THE A MASTER BYTE WITH R R SIGNAL SDA SIGNALS FROM THE SLAVE FIGURE 20. READ SEQUENCE (CSR SLAVE ADDRESS SHOWN) Figure 21 ...

Page 28

Daylight Savings Time (DST) Example DST involves setting the forward and back times and allowing the RTC device to automatically advance the time or set the time back. This can be done for current year, and future years. Many regions ...

Page 29

... Added “Related Literature*(see page 30)” on page 1 1/20/10 FN6668.6 Updated Note 2 in Ordering Information table from “These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations) ...

Page 30

... Initial Release with FN6668 making this a Rev 0. Products Intersil Corporation is a leader in the design and manufacture of high-performance analog semiconductors. The Company's products address some of the industry's fastest growing markets, such as, flat panel displays, cell phones, handheld products, and notebooks. Intersil's product families address power management and analog signal processing functions ...

Page 31

... Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries ...

Related keywords