AD7908BRUZ Analog Devices Inc, AD7908BRUZ Datasheet - Page 4

IC ADC 8BIT 8CH 1MSPS 20-TSSOP

AD7908BRUZ

Manufacturer Part Number
AD7908BRUZ
Description
IC ADC 8BIT 8CH 1MSPS 20-TSSOP
Manufacturer
Analog Devices Inc
Datasheets

Specifications of AD7908BRUZ

Data Interface
DSP, MICROWIRE™, QSPI™, Serial, SPI™
Number Of Bits
8
Sampling Rate (per Second)
1M
Number Of Converters
1
Power Dissipation (max)
13.5mW
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
20-TSSOP (0.173", 4.40mm Width)
Resolution (bits)
8bit
Sampling Rate
1MSPS
Input Channel Type
Single Ended
Supply Voltage Range - Analog
2.7V To 5.25V
Supply Current
2.7mA
Digital Ic Case Style
TSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
EVAL-AD79X8CBZ - BOARD EVALUATION FOR AD79X8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

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AD7908/AD7918/AD7928
AD7918–SPECIFICATIONS
Parameter
DYNAMIC PERFORMANCE
DC ACCURACY
ANALOG INPUT
REFERENCE INPUT
LOGIC INPUTS
LOGIC OUTPUTS
CONVERSION RATE
Signal-to-(Noise + Distortion) (SINAD)
Signal-to-Noise Ratio (SNR)
Total Harmonic Distortion (THD)
Peak Harmonic or Spurious Noise
Intermodulation Distortion (IMD)
Aperture Delay
Aperture Jitter
Channel-to-Channel Isolation
Full Power Bandwidth
Resolution
Integral Nonlinearity
Differential Nonlinearity
0 V to REF
0 V to 2
Input Voltage Ranges
DC Leakage Current
Input Capacitance
REF
DC Leakage Current
REF
Input High Voltage, V
Input Low Voltage, V
Input Current, I
Input Capacitance, C
Output High Voltage, V
Output Low Voltage, V
Floating-State Leakage Current
Floating-State Output Capacitance
Output Coding
Conversion Time
Track-and-Hold Acquisition Time
Throughput Rate
(SFDR)
Second Order Terms
Third Order Terms
Offset Error
Offset Error Match
Gain Error
Gain Error Match
Positive Gain Error
Positive Gain Error Match
Zero Code Error
Zero Code Error Match
Negative Gain Error
Negative Gain Error Match
IN
IN
Input Voltage
Input Impedance
2
REF
IN
Input Range
2
IN
IN
Input Range
IN
INL
INH
3
OL
OH
2
2
2
3
2
2
61
61
–72
–74
–90
–90
10
50
–85
8.2
1.6
10
±0.5
±0.5
±2
±0.2
±0.5
±0.2
±0.5
±0.2
±2
±0.2
±0.5
±0.2
0 to REF
0 to 2
±1
20
2.5
±1
36
0.7
0.3
±1
10
V
0.4
±1
10
Straight (Natural) Binary
Twos Complement
800
300
300
1
B Version
DRIVE
(AV
otherwise noted.)
DD
V
V
– 0.2
DRIVE
DRIVE
= V
REF
IN
DRIVE
1
IN
–4–
= 2.7 V to 5.25 V, REF
Unit
dB min
dB min
dB max
dB max
dB typ
dB typ
ns typ
ps typ
dB typ
MHz typ
MHz typ
Bits
LSB max
LSB max
LSB max
LSB max
LSB max
LSB max
LSB max
LSB max
LSB max
LSB max
LSB max
LSB max
V
V
µA max
pF typ
V
µA max
k typ
V min
V max
µA max
pF max
V min
V max
µA max
pF max
ns max
ns max
ns max
MSPS max
Test Conditions/Comments
f
fa = 40.1 kHz, fb = 41.5 kHz
f
@ 3 dB
@ 0.1 dB
Guaranteed No Missed Codes to 10 Bits
Straight Binary Output Coding
–REF
Twos Complement Output Coding
RANGE Bit Set to 1
RANGE Bit Set to 0, AV
±1% Specified Performance
f
Typically 10 nA, V
I
I
Coding Bit Set to 1
Coding Bit Set to 0
16 SCLK Cycles with SCLK at 20 MHz
Sine Wave Input
Full-Scale Step Input
See Serial Interface Section
IN
IN
SAMPLE
SOURCE
SINK
IN
= 400 kHz
= 50 kHz Sine Wave, f
= 2.5 V, f
= 200 µA
IN
= 1 MSPS
to +REF
= 200 µA, AV
SCLK
= 20 MHz, T
IN
IN
Biased about REF
= 0 V or V
DD
DD
/V
= 2.7 V to 5.25 V
SCLK
DRIVE
A
= T
= 20 MHz
MIN
= 4.75 V to 5.25 V
DRIVE
to T
IN
MAX
with
REV. A
, unless

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