AD7908BRUZ Analog Devices Inc, AD7908BRUZ Datasheet - Page 6

• Manufacturer Part Number: AD7908BRUZ
• Description: IC ADC 8BIT 8CH 1MSPS 20-TSSOP
• Manufacturer: Analog Devices Inc

Specifications of AD7908BRUZ

• Data Interface: DSP, MICROWIRE™, QSPI™, Serial, SPI™
• Number Of Bits: 8
• Sampling Rate (per Second): 1M
• Number Of Converters: 1
• Power Dissipation (max): 13.5mW
• Voltage Supply Source: Single Supply
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 20-TSSOP (0.173", 4.40mm Width)
• Resolution (bits): 8bit
• Sampling Rate: 1MSPS
• Input Channel Type: Single Ended
• Supply Voltage Range - Analog: 2.7V To 5.25V
• Supply Current: 2.7mA
• Digital Ic Case Style: TSSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: EVAL-AD79X8CBZ - BOARD EVALUATION FOR AD79X8
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

AD7908/AD7918/AD7928
AD7928–SPECIFICATIONS
Parameter
DYNAMIC PERFORMANCE
DC ACCURACY
ANALOG INPUT
REFERENCE INPUT
LOGIC INPUTS
LOGIC OUTPUTS
Signal-to-(Noise + Distortion) (SINAD)
Signal-to-Noise Ratio (SNR)
Total Harmonic Distortion (THD)
Peak Harmonic or Spurious Noise
Intermodulation Distortion (IMD)
Aperture Delay
Aperture Jitter
Channel-to-Channel Isolation
Full Power Bandwidth
Resolution
Integral Nonlinearity
Differential Nonlinearity
0 V to REF
0 V to 2
Input Voltage Ranges
DC Leakage Current
Input Capacitance
REF
DC Leakage Current
REF
Input High Voltage, V
Input Low Voltage, V
Input Current, I
Input Capacitance, C
Output High Voltage, V
Output Low Voltage, V
Floating-State Leakage Current
Floating-State Output Capacitance
Output Coding
(SFDR)
Second Order Terms
Third Order Terms
Offset Error
Offset Error Match
Gain Error
Gain Error Match
Positive Gain Error
Positive Gain Error Match
Zero Code Error
Zero Code Error Match
Negative Gain Error
Negative Gain Error Match
IN
IN
Input Voltage
Input Impedance
2
REF
IN
Input Range
2
IN
IN
Input Range
IN
INL
INH
3
OL
OH
2
2
2
2
3
2
B Version
70
69
70
–77
–73
–78
–76
–90
–90
10
50
–85
8.2
1.6
12
±1
–0.9/+1.5
±8
±0.5
±1.5
±0.5
±1.5
±0.5
±8
±0.5
±1
±0.5
0 to REF
0 to 2
±1
20
2.5
±1
36
0.7
0.3
±1
10
V
0.4
±1
10
Straight (Natural) Binary
Twos Complement
DRIVE
(AV
otherwise noted.)
V
V
DD
– 0.2
DRIVE
DRIVE
= V
REF
IN
2
DRIVE
IN
–6–
= 2.7 V to 5.25 V, REF
Unit
dB min
dB min
dB min
dB max
dB max
dB max
dB max
dB typ
dB typ
ns typ
ps typ
dB typ
MHz typ
MHz typ
Bits
LSB max
LSB max
LSB max
LSB max
LSB max
LSB max
LSB max
LSB max
LSB max
LSB max
LSB max
LSB max
V
V
µA max
pF typ
V
µA max
k typ
V min
V max
µA max
pF max
V min
V max
µA max
pF max
Test Conditions/Comments
f
@ 5 V
@ 3 V Typically 70 dB
@ 5 V Typically –84 dB
@ 3 V Typically –77 dB
@ 5 V Typically –86 dB
@ 3 V Typically –80 dB
fa = 40.1 kHz, fb = 41.5 kHz
f
@ 3 dB
@ 0.1 dB
Guaranteed No Missed Codes to 12 Bits
Straight Binary Output Coding
Typically ±0.5 LSB
–REF
Twos Complement Output Coding
Typically ±0.8 LSB
RANGE Bit Set to 1
RANGE Bit Set to 0, AV
±1% Specified Performance
f
Typically 10 nA, V
I
I
Coding Bit Set to 1
Coding Bit Set to 0
IN
IN
SAMPLE
SOURCE
SINK
IN
= 50 kHz Sine Wave, f
= 400 kHz
= 2.5 V, f
= 200 µA
IN
= 1 MSPS
= 200 µA, AV
to +REF
SCLK
= 20 MHz, T
IN
IN
Biased about REF
= 0 V or V
DD
DD
/V
= 2.7 V to 5.25 V
SCLK
DRIVE
A
= T
= 20 MHz
MIN
= 4.75 V to 5.25 V
DRIVE
to T
IN
MAX
with
REV. A
, unless