LTC2428IG Linear Technology, LTC2428IG Datasheet - Page 32
![IC ADC 20BIT 8CH MICROPWR 28SSOP](/photos/6/59/65971/161-28-ssop_sml.jpg)
LTC2428IG
Manufacturer Part Number
LTC2428IG
Description
IC ADC 20BIT 8CH MICROPWR 28SSOP
Manufacturer
Linear Technology
Datasheet
1.LTC2424CGPBF.pdf
(36 pages)
Specifications of LTC2428IG
Number Of Bits
20
Sampling Rate (per Second)
7.5
Data Interface
MICROWIRE™, Serial, SPI™
Number Of Converters
1
Power Dissipation (max)
1mW
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
28-SSOP (0.200", 5.30mm Width)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LTC2428IG
Manufacturer:
LT
Quantity:
5 000
Part Number:
LTC2428IG
Manufacturer:
LINEAR/凌特
Quantity:
20 000
Part Number:
LTC2428IG#PBF
Manufacturer:
LINEAR/凌特
Quantity:
20 000
APPLICATIONS
LTC2424/LTC2428
channel resistance of the multiplexer does not contribute
much to the error budget, as only input op amp current
flows through the switch. The LTC1050 was chosen for
its low input current and offset voltage, as well as its
ability to drive the input of a
Insert Gain or Buffering After the Multiplexer
Separate MUXOUT and ADCIN terminals permit insertion
of a gain stage between the MUX and the ADC. If passive
filtering is used at the input to the ADC, a buffer amplifier
is strongly recommended to avoid errors resulting from
the dynamic ADC input current. If antialiasing is required,
it should be placed at the input to the MUX. If bandwidth
limiting is required to improve noise performance, a filter
with a –3dB point at 1500Hz will reduce the effective total
noise bandwidth of the system to 15Hz. A roll-off at 1500Hz
32
U
INFORMATION
U
ANALOG
BANDWIDTH
INPUTS
OPTIONAL
Figure 35. Inserting Gain Between the Multiplexer and the ADC Input
LIMIT
C1
0.022 F
ADC.
5.1k
R1
W
10
11
12
13
14
15
17
9
5
CH0
CH1
CH2
CH3
CH4
CH5
CH6
CH7
ZS
SET
3
2
R2
5.1K
+
–
8-CHANNEL
LTC1050
U
MUX
OPTIONAL GAIN
5V
AND ROLL-OFF
7
4
MUXOUT
200k
1, 6, 16, 18, 22, 27, 28
R3
C2
6
7
4
ADCIN
eliminates all higher order images of the base bandwidth
of 6Hz. In Figure 35, the optional bandwidth-limiting filter
has a – 3dB point at 1450Hz. This filter can be inserted after
the multiplexer provided that higher source impedance
prior to the multiplexer does not reduce the – 3dB fre-
quency, extending settling time, and resulting in charge
sharing between samples. The settling time of this filter to
20+ bits of accuracy is less than 2ms. In the presence of
external wideband noise, this filter reduces the apparent
noise by a factor of 5. Note that the noise bandwidth for
noise developed in the amplifier is 150Hz. In the example
shown, the gain of the amplifier is set to 40, the point at
which amplifier noise gain dominates the LTC2428 noise.
Input voltage range as shown is then 0V to 125mV DC. The
recommended capacitor at C2 for a gain of 40 would be
560pF.
R4
5K
+
MAY BE REQUIRED BY OTHER
AMPLIFIERS (IS REQUIRED BY
BIPOLAR AMPLIFIERS)
–
20-BIT
GND
LTC2428
ADC
3
FS
SET
V
CC
2, 8
CSMUX
CSADC
24248 F35
SDO
SCK
CLK
D
IN
F
O
23
20
25
19
21
24
26
5V
V
10 F
CC