AD6644AST-65 Analog Devices Inc, AD6644AST-65 Datasheet - Page 17

• Manufacturer Part Number: AD6644AST-65
• Description: IC ADC 14BIT 65MSPS CMOS 52-LQFP
• Manufacturer: Analog Devices Inc

Specifications of AD6644AST-65

• Rohs Status: RoHS non-compliant
• Number Of Bits: 14
• Sampling Rate (per Second): 65M
• Data Interface: Parallel
• Number Of Converters: 4
• Power Dissipation (max): 1.3W
• Voltage Supply Source: Analog and Digital
• Operating Temperature: -25°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 52-LQFP

Jitter Considerations
The signal-to-noise ratio (SNR) for an ADC can be predicted.
When normalized to ADC codes, Equation 1 accurately
predicts the SNR based on three terms. These are jitter, average
DNL error, and thermal noise. Each of these terms contributes
to the noise within the converter (see Equation 1).
where:
f
t
and internal encode circuitry).
ε is the average DNL of the ADC (typically 0.41 LSB).
n is the number of bits in the ADC.
V
of the ADC (typically 2.5 LSB).
ANALOG
j rms
NOISE rms
is the rms jitter of the encode (rms sum of encode source
SNR
is the analog input frequency.
is the V rms thermal noise referred to the analog input
=
−
⎛
⎜
⎜
⎝
20
V
NOISE
×
2
log
n
rms
⎡
⎢
⎣
⎛ +
⎜
⎝
1
⎞
⎟
⎟
⎠
2
2
n
⎤
⎥
⎥
⎦
ε
1
2 /
⎞
⎟
⎠
2
+
(
2
π
×
f
ANALOG
×
t
j
rms
)
2
+
Rev. D | Page 17 of 24
(1)
For a 14-bit ADC like the AD6644, aperture jitter can greatly
affect the SNR performance as the analog frequency is
increased. Figure 31 shows a family of curves that demonstrates
the expected SNR performance of the AD6644 as jitter increases
and is derived from Equation 1.
For a complete review of aperture jitter, see Application Note
AN-756, Sampled Systems and the Effects of Clock Phase Noise
and Jitter, at www.analog.com.
80
75
70
65
60
55
0
AIN = 110MHz
0.1
Figure 31. SNR vs. Jitter
0.2
JITTER (ps)
AIN = 150MHz
0.3
AIN = 30MHz
AIN = 190MHz
0.4
AIN = 70MHz
0.5
AD6644
0.6