MAX11800GTC/V+T Maxim Integrated Products, MAX11800GTC/V+T Datasheet - Page 38

no-image

MAX11800GTC/V+T

Manufacturer Part Number
MAX11800GTC/V+T
Description
IC TOUCH SCREEN CTRLR LP 12WQFN
Manufacturer
Maxim Integrated Products
Type
Resistiver
Datasheet

Specifications of MAX11800GTC/V+T

Touch Panel Interface
4-Wire
Number Of Inputs/keys
1 TSC
Resolution (bits)
12 b
Data Interface
Serial, SPI™
Data Rate/sampling Rate (sps, Bps)
105k
Voltage - Supply
1.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 105°C
Mounting Type
Surface Mount
Package / Case
12-WQFN Exposed Pad
Voltage Supply Source
Single Supply
Sampling Rate (per Second)
105k
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Low-Power, Ultra-Small Resistive Touch-Screen
Controllers with I
The SPI interface consists of three inputs, DIN, DCLK,
CS, and one output, DOUT. A logic-high on CS dis-
ables the MAX11800/MAX11802 digital interface and
places DOUT in a high-impedance state. Pulling CS low
enables the MAX11800/MAX11802 digital interface. The
MAX11800/MAX11802 provide two possible implemen-
tations of SPI instructions. In rising-edge-driven opera-
tions, the devices are able to run at maximum clock
speeds. Carefully consider the hold time requirements
of the MAX11800/MAX11802 and minimize board skew
contributions when running the MAX11800/MAX11802
at maximum clock speed. In falling-edge-driven opera-
tions, the device is less sensitive to board skew contri-
butions, but slower clock speeds are required to meet
the MAX11800/MAX11802 setup time requirements. For
the MAX11800/MAX11802, read patterns output data is
either latched on the rising edge running at maximum
clock rates or on the falling edges running at reduced
clock rates.
Figure 17. SPI Single Configuration Register Write Sequence—MAX11800/MAX11802
Figure 18. SPI Multiple Configuration Register Write Sequence—MAX11800/MAX11802
38
______________________________________________________________________________________
SCLK
SCLK
DIN
DIN
CS
CS
SPI Communication Sequence
1
A6
1
(MAX11800/MAX11802)
A5
A
n
2
[6:0]
A4
3
7
A3
4
9
A2
2
5
C/SPI Interface
A1
D
6
n
[7:0]
A0
7
W
8
Figure 17 shows the supported write operation
sequence for the MAX11800/MAX11802. A single con-
figuration register can be written in a 2-byte operation,
composed of a target register address (A[6:0], plus a
write mode indicator bit) followed by data to be written
to the target register (D[7:0]).
During write sequences, the DOUT line is not accessed
by the SPI. DOUT remains high impedance throughout
the command. Using the optional bus holder, the DOUT
line retains the previous value unless altered by a
device sharing the bus.
The MAX11800/MAX11802 SPI interface supports multi-
ple register write operations within a single sequence
as shown in Figure 18. By repeating the address plus
data byte pairs (in write mode), an unlimited number of
registers can be written in a single transfer. Do not per-
mit to combine write and read operations within the
same SPI sequence.
17
D7
9
D6
A
m
10
[6:0]
D5
11
23
D4
12
25
SPI Configuration Register Write
D3
13
D2
14
D
m
[7:0]
(MAX11800/MAX11802)
D1
15
D0
16
32

Related parts for MAX11800GTC/V+T