AD5327BRUZ Analog Devices Inc, AD5327BRUZ Datasheet

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AD5327BRUZ

Manufacturer Part Number
AD5327BRUZ
Description
IC DAC 12BIT QUAD 2.5V 16-TSSOP
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD5327BRUZ

Data Interface
Serial
Settling Time
8µs
Number Of Bits
12
Number Of Converters
4
Voltage Supply Source
Single Supply
Power Dissipation (max)
4.5mW
Operating Temperature
-40°C ~ 105°C
Mounting Type
Surface Mount
Package / Case
16-TSSOP
Resolution (bits)
12bit
Sampling Rate
125kSPS
Input Channel Type
Serial
Supply Voltage Range - Analog
2.5V To 5.5V
Supply Current
500µA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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FEATURES
AD5307: 4 buffered 8-bit DACs in 16-lead TSSOP
AD5317: 4 buffered 10-bit DACs in 16-lead TSSOP
AD5327: 4 buffered 12-bit DACs in 16-lead TSSOP
Low power operation: 400 μA @ 3 V, 500 μA @ 5 V
2.5 V to 5.5 V power supply
Guaranteed monotonic by design over all codes
Power down to 90 nA @ 3 V, 300 nA @ 5 V ( LDAC pin)
Double-buffered input logic
Buffered/unbuffered reference input options
Output range: 0 V to V
Power-on reset to 0 V
Simultaneous update of outputs ( LDAC pin)
Asynchronous clear facility ( CLR pin)
Low power, SPI®-, QSPI™-, MICROWIRE™-, and DSP-
SDO daisy-chaining option
On-chip rail-to-rail output buffer amplifiers
Temperature range of −40°C to +105°C
APPLICATIONS
Portable battery-powered instruments
Digital gain and offset adjustment
Programmable voltage and current sources
Programmable attenuators
Industrial process control
1
Rev. C
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
Protected by U.S. Patent No. 5,969,657; other patents pending.
compatible 3-wire serial interface
A version: ±1 LSB INL; B version: ±0.625 LSB INL
A version: ±4 LSB INL; B version: ±2.5 LSB INL
A version: ±16 LSB INL; B version: ±10 LSB INL
REF
or 0 V to 2 V
SYNC
SCLK
SDO
DIN
DCEN
AD5307/AD5317/AD5327
REF
INTERFACE
LOGIC
LDAC CLR
LDAC
2.5 V to 5.5 V, 400 μA, Quad Voltage Output,
FUNCTIONAL BLOCK DIAGRAM
REGISTER
REGISTER
REGISTER
REGISTER
8-/10-/12-Bit DACs in 16-Lead TSSOP
INPUT
INPUT
INPUT
INPUT
POWER-ON
RESET
V
DD
Figure 1.
REGISTER
REGISTER
REGISTER
REGISTER
DAC
DAC
DAC
DAC
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
GENERAL DESCRIPTION
The AD5307/AD5317/AD5327
voltage-output DACs in 16-lead TSSOP that operate from single
2.5 V to 5.5 V supplies and consume 400 μA at 3 V. Their on-
chip output amplifiers allow the outputs to swing rail-to-rail with
a slew rate of 0.7 V/μs. The AD5307/AD5317/AD5327 utilize
versatile 3-wire serial interfaces that operate at clock rates up to
30 MHz; these parts are compatible with standard SPI, QSPI,
MICROWIRE, and DSP interface standards.
The references for the four DACs are derived from two reference
pins (one per DAC pair). These reference inputs can be configured
as buffered or unbuffered inputs. Each part incorporates a power-
on reset circuit, ensuring that the DAC outputs power up to 0 V
and remain there until a valid write to the device takes place.
There is also an asynchronous active low CLR pin that clears all
DACs to 0 V. The outputs of all DACs can be updated simul-
taneously using the asynchronous LDAC input. Each part
contains a power-down feature that reduces the current
consumption of the device to 300 nA @ 5 V (90 nA @ 3 V). The
parts can also be used in daisy-chaining applications using the
SDO pin.
All three parts are offered in the same pinout, allowing users to
select the amount of resolution appropriate for their application
without redesigning their circuit board.
V
V
STRING
STRING
STRING
STRING
REF
DAC A
DAC B
DAC C
DAC D
REF
CD
AB
AD5307/AD5317/AD5327
BUFFER
BUFFER
BUFFER
BUFFER
POWER-DOWN
GAIN-SELECT
PD
LOGIC
LOGIC
GND
©2006 Analog Devices, Inc. All rights reserved.
V
V
V
V
OUT
OUT
OUT
OUT
1
are quad 8-,10-,12-bit buffered
C
A
B
D
www.analog.com

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AD5327BRUZ Summary of contents

Page 1

FEATURES AD5307: 4 buffered 8-bit DACs in 16-lead TSSOP A version: ±1 LSB INL; B version: ±0.625 LSB INL AD5317: 4 buffered 10-bit DACs in 16-lead TSSOP A version: ±4 LSB INL; B version: ±2.5 LSB INL AD5327: 4 buffered ...

Page 2

AD5307/AD5317/AD5327 TABLE OF CONTENTS Features .............................................................................................. 1 Applications....................................................................................... 1 General Description ......................................................................... 1 Functional Block Diagram .............................................................. 1 Revision History ............................................................................... 2 Specifications..................................................................................... 3 AC Characteristics........................................................................ 5 Timing Characteristics ................................................................ 5 Absolute Maximum Ratings............................................................ 7 ESD Caution.................................................................................. 7 Pin Configuration ...

Page 3

SPECIFICATIONS kΩ to GND REF L Table 1. 2 Parameter Min PERFORMANCE AD5307 Resolution Relative Accuracy Differential Nonlinearity AD5317 Resolution ...

Page 4

AD5307/AD5317/AD5327 2 Parameter Min LOGIC INPUTS Input Current Input Low Voltage Input High Voltage, V 1.7 IH (Excluding DCEN) Input High Voltage, V 2.4 IH (DCEN) 2.1 2.0 Pin Capacitance LOGIC OUTPUT (SDO 4 ...

Page 5

AC CHARACTERISTICS kΩ to GND Table 2. Parameter 2, 3 Output Voltage Settling Time AD5307 AD5317 AD5327 Slew Rate Major-Code Change Glitch Energy Digital Feedthrough SDO Feedthrough ...

Page 6

AD5307/AD5317/AD5327 SCLK SYNC DIN DB15 1 LDAC 2 LDAC CLR NOTES 1 ASYNCHRONOUS LDAC UPDATE MODE. 2 SYNCHRONOUS LDAC UPDATE MODE. SCLK SYNC LDAC DIN DB15 SDO 2mA OUTPUT PIN ...

Page 7

ABSOLUTE MAXIMUM RATINGS T = 25°C, unless otherwise noted. A Table 4. 1 Parameter V to GND DD Digital Input Voltage to GND Digital Output Voltage to GND Reference Input Voltage to GND V A − GND ...

Page 8

AD5307/AD5317/AD5327 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS Table 5. Pin Function Descriptions Pin No. Mnemonic Description 1 CLR Active Low Control Input. Loads all 0s to all input and DAC registers. Therefore, the outputs also LDAC ...

Page 9

TYPICAL PERFORMANCE CHARACTERISTICS 1 25° 0.5 0 –0.5 –1 100 150 CODE Figure 6. AD5307 INL 25° –1 –2 –3 ...

Page 10

AD5307/AD5317/AD5327 0. 25° 0.25 0 –0.25 –0. (V) REF Figure 12. AD5307 INL Error and DNL Error vs ...

Page 11

V (V) DD Figure 18. Supply Current vs. Supply Voltage 0.5 0.4 0.3 0.2 +25°C 0.1 0 2.5 3.0 3.5 4.0 V (V) DD Figure 19. Power-Down ...

Page 12

AD5307/AD5317/AD5327 350 400 450 500 I (µA) DD Figure 24. I Histogram with and 2.50 2.49 2.48 2.47 1µs/DIV Figure 25. AD5327 Major-Code Transition Glitch Energy 10 0 –10 ...

Page 13

TERMINOLOGY Relative Accuracy For the DAC, relative accuracy, or integral nonlinearity (INL measure of the maximum deviation in LSB from a straight line passing through the endpoints of the DAC transfer function. Figure 6 through Figure 8 show ...

Page 14

AD5307/AD5317/AD5327 TRANSFER FUNCTION VOLTAGE OUTPUT VOLTAGE NEGATIVE OFFSET DAC CODE ERROR ACTUAL IDEAL LOWER DEAD BAND CODES AMPLIFIER FOOTROOM NEGATIVE OFFSET ERROR Figure 29. Transfer Function with Negative Offset OUTPUT POSITIVE OFFSET ERROR DAC CODE Figure 30. Transfer Function with ...

Page 15

FUNCTIONAL DESCRIPTION The AD5307/AD5317/AD5327 are quad resistor-string DACs fabricated on a CMOS process with resolutions of 8, 10, and 12 bits respectively. Each contains four output buffer amplifiers and is written to via a 3-wire serial interface. They operate from ...

Page 16

AD5307/AD5317/AD5327 OUTPUT AMPLIFIER The output buffer amplifier is capable of generating output voltages to within either rail. Its actual range depends on the value GAIN, offset error, and gain error. REF If a gain ...

Page 17

SERIAL INTERFACE The AD5307/AD5317/AD5327 are controlled over versatile 3-wire serial interfaces that operate at clock rates MHz and are compatible with SPI, QSPI, MICROWIRE, and DSP interface standards. INPUT SHIFT REGISTER The input shift register is ...

Page 18

AD5307/AD5317/AD5327 LOW POWER SERIAL INTERFACE To minimize the power consumption of the device, the interface powers up fully only when the device is being written to, that is, on the falling edge of SYNC . The SCLK and DIN input ...

Page 19

The time to exit power-down is typically 2.5 μs for V and 5 μs when This is the time from the rising edge when the output voltage deviates from its power-down voltage. ...

Page 20

AD5307/AD5317/AD5327 APPLICATIONS TYPICAL APPLICATION CIRCUIT The AD5307/AD5317/AD5327 can be used with a wide range of reference voltages and offer full, one-quadrant multiplying capability over a reference range of 0. these devices are used with a fixed precision ...

Page 21

OPTO-ISOLATED INTERFACE FOR PROCESS-CONTROL APPLICATIONS The AD5307/AD5317/AD5327 each have a versatile 3-wire serial interface, making them ideal for generating accurate voltages in process-control and industrial applications. Due to noise, safety requirements, or distance, it may be necessary to isolate the ...

Page 22

AD5307/AD5317/AD5327 DAISY CHAINING For systems that contain several DACs, or where the user wishes to read back the DAC contents for diagnostic purposes, the SDO pin can be used to daisy-chain several devices together and provide serial readback. Figure 4 ...

Page 23

Table 7. Overview of AD53xx Serial Devices Part No. Resolution No. of DACs SINGLES AD5300 8 1 AD5310 10 1 AD5320 12 1 AD5301 8 1 AD5311 10 1 AD5321 12 1 DUALS AD5302 8 2 AD5312 10 2 AD5322 ...

Page 24

AD5307/AD5317/AD5327 OUTLINE DIMENSIONS 0.15 0.05 5.10 5.00 4. 4.50 6.40 4.40 BSC 4. PIN 1 1.20 MAX 0.20 0.09 8° 0.30 0.65 0° 0.19 SEATING BSC PLANE COPLANARITY 0.10 COMPLIANT TO JEDEC STANDARDS MO-153-AB Figure 47. ...

Page 25

... AD5327BRUZ −40°C to +105°C 1 AD5327BRUZ-REEL −40°C to +105°C 1 AD5327BRUZ-REEL7 −40°C to +105° Pb-free part. Package Description 16-Lead Thin Shrink Small Outline Package [TSSOP] 16-Lead Thin Shrink Small Outline Package [TSSOP] 16-Lead Thin Shrink Small Outline Package [TSSOP] ...

Page 26

AD5307/AD5317/AD5327 NOTES Rev Page ...

Page 27

NOTES AD5307/AD5317/AD5327 Rev Page ...

Page 28

AD5307/AD5317/AD5327 NOTES ©2006 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. C02067–0–3/06(C) Rev Page ...

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