AD7808BR Analog Devices Inc, AD7808BR Datasheet - Page 4

• Manufacturer Part Number: AD7808BR
• Description: IC DAC 10BIT 3.3V OCTAL 24-SOIC
• Manufacturer: Analog Devices Inc

Specifications of AD7808BR

• Settling Time: 1.5µs
• Rohs Status: RoHS non-compliant
• Number Of Bits: 10
• Data Interface: Serial
• Number Of Converters: 4
• Voltage Supply Source: Analog and Digital
• Power Dissipation (max): 99mW
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 24-SOIC (7.5mm Width)
• Number Of Channels: 8
• Resolution: 10b
• Conversion Rate: 667KSPS
• Interface Type: Serial (3-Wire)
• Single Supply Voltage (typ): 3.3/5V
• Dual Supply Voltage (typ): Not RequiredV
• Power Supply Requirement: Analog and Digital
• Output Type: Voltage
• Single Supply Voltage (min): 2.97V
• Single Supply Voltage (max): 5.5V
• Dual Supply Voltage (min): Not RequiredV
• Dual Supply Voltage (max): Not RequiredV
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 24
• Package Type: SOIC W
• Lead Free Status / RoHS Status: Not Compliant

AD7804/AD7805/AD7808/AD7809
Internal Reference. All specifications T
Parameter
t
t
t
t
t
t
t
t
t
t
NOTES
1
Specifications subject to change without notice.
AD7804/AD7808 TIMING CHARACTERISTICS
Sample tested during initial release and after any redesign or process change that may affect this parameter. All input signals are specified with tr = tf = 5 ns and
1
2
3
4
5
6
6A
7
8
9
timed from a voltage of (V
CLKIN(I)
FSIN(I)
LDAC 1
LDAC 2
SDIN(I)
CLR
1
2
TIMING REQUIREMENTS FOR SYNCHRONOUS LDAC UPDATE OR LDAC MAY BE TIED PERMANENTLY LOW IF REQUIRED.
TIMING REQUIREMENTS FOR ASYNCHRONOUS LDAC UPDATE.
IL
+ V
Limit at T
All Versions
100
40
40
30
30
5
6
90
20
40
100
IH
)/2.
DB15
t
t
5
4
t
MIN
6
MIN
Figure 1. Timing Diagram for AD7804 and AD7808
to T
, T
MAX
MAX
unless otherwise noted.)
t
2
t
1
t
3
DB0
t
5
–4–
t
7
1
Units
ns min
ns min
ns min
ns min
ns min
ns min
ns min
ns max
ns min
ns min
ns min
(V
t
9
DD
t
6A
= 3.3 V
t
8
10% to 5 V
t
8
10%; AGND = DGND = 0 V; Reference =
Description
CLKIN Cycle Time
CLKIN High Time
CLKIN Low Time
FSIN Setup Time
Data Setup Time
Data Hold Time
LDAC Hold Time
FSIN Hold Time
LDAC, CLR Pulsewidth
LDAC Setup Time
REV. A