MT47H32M8BP-5E IT:B Micron Technology Inc, MT47H32M8BP-5E IT:B Datasheet - Page 84
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MT47H32M8BP-5E IT:B
Manufacturer Part Number
MT47H32M8BP-5E IT:B
Description
Manufacturer
Micron Technology Inc
Type
DDR2 SDRAMr
Datasheet
1.MT47H32M8BP-5E_ITB.pdf
(128 pages)
Specifications of MT47H32M8BP-5E IT:B
Organization
32Mx8
Density
256Mb
Address Bus
15b
Access Time (max)
600ps
Maximum Clock Rate
400MHz
Operating Supply Voltage (typ)
1.8V
Package Type
FBGA
Operating Temp Range
-40C to 85C
Operating Supply Voltage (max)
1.9V
Operating Supply Voltage (min)
1.7V
Supply Current
125mA
Pin Count
60
Mounting
Surface Mount
Operating Temperature Classification
Industrial
Lead Free Status / Rohs Status
Compliant
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PDF: 09005aef8117c187
256MbDDR2.pdf - Rev. M 7/09 EN
10. Issue two or more REFRESH commands.
11. Issue a LOAD MODE command to the MR with LOW to A8 to initialize device operation
12. Issue a LOAD MODE command to the EMR to enable OCD default by setting bits E7, E8,
13. Issue a LOAD MODE command to the EMR to enable OCD exit by setting bits E7, E8, and
14. The DDR2 SDRAM is now initialized and ready for normal operation 200 clock cycles af-
15. DM represents DM for the x4, x8 configurations and UDM, LDM for the x16 configura-
16. A10 = PRECHARGE ALL, CODE = desired values for mode registers (bank addresses are
(that is, to program operating parameters without resetting the DLL). To access the MR,
set BA0 and BA1 LOW; remaining MR bits must be set to desired settings. Mode Register
(MR) (page 70) for all MR requirements.
and E9 to “1,” and then setting all other desired parameters. To access the EMR, set BA0
LOW and BA1 HIGH (see Extended Mode Register (EMR) (page 75) for all EMR require-
ments.
E9 to “0,” and then setting all other desired parameters. To access the extended mode
registers, EMR, set BA0 LOW and BA1 HIGH for all EMR requirements.
ter the DLL RESET at Tf0.
tion; DQS represents DQS, DQS#, UDQS, UDQS#, LDQS, LDQS#, RDQS, RDQS# for the
appropriate configuration (x4, x8, x16); DQ represents DQ0–DQ3 for x4, DQ–DQ7 for x8
and DQ0–DQ15 for x16.
required to be decoded).
84
Micron Technology, Inc. reserves the right to change products or specifications without notice.
256Mb: x4, x8, x16 DDR2 SDRAM
©2003 Micron Technology, Inc. All rights reserved.
Initialization
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