PEF82902FV11XP Lantiq, PEF82902FV11XP Datasheet - Page 161
PEF82902FV11XP
Manufacturer Part Number
PEF82902FV11XP
Description
Manufacturer
Lantiq
Datasheet
1.PEF82902FV11XP.pdf
(205 pages)
Specifications of PEF82902FV11XP
Lead Free Status / Rohs Status
Supplier Unconfirmed
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DIS_IOM Disable IOM
4.7.10
MCDA
Value after reset: FF
MCDAxy Monitoring CDAxy Bits
4.7.11
STI
Value after reset: 00
Data Sheet
STOV21 STOV20 STOV11 STOV10
Bit7
7
7
MCDA21
MCDA - Monitoring CDA Bits
STI - Synchronous Transfer Interrupt
DIS_IOM should be set to ‘1’ if external devices connected to the IOM
interface should be “disconnected” e.g. for power saving purposes.
However, the T-SMINT
bit.
0 =
1 =
Bit 7 and Bit 6 of the CDAxy registers are mapped into the MCDA register.
This can be used for monitoring the D-channel bits on DU and DD and the
“Echo bits” on the TIC bus with the same register.
Bit6
The IOM interface is enabled
The IOM interface is disabled (FSC, DCL, clock outputs have high
impedance; DU, DD data line inputs are switched off and outputs
are high impedant)
H
H
Bit7
MCDA20
â
I internal operation is independent of the DIS_IOM
Bit6
read
read
149
STI21
Bit7
MCDA11
STI20
Bit6
Register Description
STI11
Address:
Address:
Bit7
MCDA10
PEF 82902
2001-11-09
STI10
Bit6
0
0
57
58
H
H
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