PEF20550HV2.1XT Infineon Technologies, PEF20550HV2.1XT Datasheet - Page 150
PEF20550HV2.1XT
Manufacturer Part Number
PEF20550HV2.1XT
Description
Manufacturer
Infineon Technologies
Datasheet
1.PEF20550HV2.1XT.pdf
(407 pages)
Specifications of PEF20550HV2.1XT
Lead Free Status / Rohs Status
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4.6.19 Synchronous Transfer Receive Address Register B (SARB)
Access in demultiplexed P-interface mode:
Access in multiplexed P-interface mode:
Reset value: xx
The SARB-register specifies for synchronous transfer channel B from which input
interface, port and time slot the serial data is extracted. This data can then be read from
the STDB register.
ISRB
MTRB6..0
4.6.20 Synchronous Transfer Transmit Address Register A (SAXA)
Access in demultiplexed P-interface mode:
Access in multiplexed P-interface mode:
Reset value: xx
The SAXA-register specifies for synchronous transfer channel A to which output
interface, port and time slot the serial data contained in the STDA-register is sent.
ISXA
MTXA6..0
Semiconductor Group
bit 7
bit 7
ISRB
ISXA
MTRB6
Interface Select Receive for channel B.
0… selects the PCM-interface as the input interface for synchronous
1… selects the CFI-interface as the input interface for synchronous
number at the interface selected by ISRB according to tables 16 and 17:
MTRB6..0 = MA6..0.
MTXA6
Interface Select Transmit for channel A.
0… selects the PCM-interface as the output interface for synchronous
1… selects the CFI-interface as the output interface for synchronous
number at the interface selected by ISXA according to tables 16 and 17:
MTXA6..0 = MA6..0.
P-Transfer Receive Address for channel B; selects the port and time slot
P-Transfer Transmit Address for channel A; selects the port and time slot
H
H
channel B.
channel B.
channel A.
channel A.
MTRB5
MTXA5
MTRB4
MTXA4
150
MTRB3
MTXA3
read/write
read/write
read/write
read/write
Detailed Register Description
MTRB2
MTXA2
address: 06
address: 07
address: 0C
address: 0E
MTRB1
MTXA1
PEB 20550
PEF 20550
bit 0
bit 0
H
H
H
H
MTRB0
MTXA0
01.96
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