PEF20550HV2.1XT Infineon Technologies, PEF20550HV2.1XT Datasheet - Page 265
PEF20550HV2.1XT
Manufacturer Part Number
PEF20550HV2.1XT
Description
Manufacturer
Infineon Technologies
Datasheet
1.PEF20550HV2.1XT.pdf
(407 pages)
Specifications of PEF20550HV2.1XT
Lead Free Status / Rohs Status
Compliant
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5.4.2
The switching of subchannels is programmed by first specifying the timeslot (which is
always 8 bits wide) to be switched, then by restricting the actual switching operation to
the desired bandwidth and sub-timeslot position. The switching function for an (8 bit) CFI
timeslot is programmed in the control memory (CM) by writing a pointer that points to an
(8 bit) PCM timeslot to the corresponding data field location. The MADR register
contains the pointer (PCM timeslot) and the MAAR register is used to specify the CFI
timeslot.
The ‘8 bit’ connection can now be restricted to the desired 4 or 2 bit connection by
selecting an appropriate control memory code. The code is programmed via
MACR:CMC3 … 0. These subchannel codes perform two functions: they specify the
bandwidth (actual number of bits to be switched) and the location of the sub-timeslot
within the selected (8 bit) PCM timeslot. The location of the sub-timeslot within the
selected (8 bit) CFI timeslot is predefined by the setting of the CSCR register. Each CFI
port can be set to a different sub-timeslot mode. In each mode a certain relationship
exists between programmed bandwidth (which can still be individually selected for each
CFI timeslot) and the occupied bit positions within the timeslot (which is fixed for each
CFI port by the CSCR register).
It should be noted that only one sub-timeslot can exist within a given CFI timeslot. On
the PCM side however each timeslot may be split up into 2
mixture of these.
The CSCR register has the following format:
CFI Subchannel Register
CSCR
Below, all possible combinations of subchannel switching between the CFI and PCM
interfaces are shown:
Semiconductor Group
Subchannel Switching
bit 7
SC31
SC30
SC21
SC20
265
read/write
SC11
SC10
reset value:
4 bits, 4
Application Hints
SC01
PEB 20550
2 bits or any
PEF 20550
bit 0
00
SC00
H
01.96
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