PEF20550HV2.1XT Infineon Technologies, PEF20550HV2.1XT Datasheet - Page 359
PEF20550HV2.1XT
Manufacturer Part Number
PEF20550HV2.1XT
Description
Manufacturer
Infineon Technologies
Datasheet
1.PEF20550HV2.1XT.pdf
(407 pages)
Specifications of PEF20550HV2.1XT
Lead Free Status / Rohs Status
Compliant
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Note that the CM of the ELIC is not reset with a physical ELIC reset. Thus, the first step
in initializing the CM is to set all addresses to ‘unassigned channel’. Next, the monitor
and control time slot pairs are programmed for both IOM-2 channels. For a detailed
6.1.3
This part of the Application Note completes the initialization of the ELIC, and thus of the
line card, by setting the Control Memory (CM) of the ELIC to handle the monitor and
control time slots of two digital IOM-2 subscribers. As shown below, the OCTAT-P is set
into the deactivated (idle) state:
Figure 125
Idle State of Line Card with ELIC
description of CM handling please refer to chapter 5.3 of the Application Hints. With the
CM initialized, the CFI and PCM interfaces can be activated. Finally, the OCTAT-P is set
into the deactivated (idle) state by the appropriate C/I code.
Semiconductor Group
’Info 0’
U
PN
ELIC
OCTAT -P
®
CM and OCTAT-P Initialization
R
C/I Code ’1111’
C/I Code ’1111’
IOM -2
R
®
and OCTAT-P
ELIC
359
Code Field
1
0
1
1
R
0
0
0
0 1
0
0
1
0
0
0
1
Control Memory
X
X
1
1
X X X X X X X
X
1
1
X
1
1
Data Field
C/I Value
C/I Value
X
1
1
Application Notes
X
1
1
X
1
1
PEB 20550
X
PEF 20550
1
1 1
ITS08105
X
1
01.96
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