RPIXP2850BB Intel, RPIXP2850BB Datasheet - Page 145

• Manufacturer Part Number: RPIXP2850BB
• Manufacturer: Intel

Specifications of RPIXP2850BB

• Operating Supply Voltage (typ): 1.3/1.5/2.5/3.3V
• Operating Supply Voltage (max): 1.575/2.7/3.465V
• Operating Supply Voltage (min): 1.235/2.3/3.135V
• Mounting: Surface Mount
• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Operating Temperature Classification: Commercial
• Lead Free Status / Rohs Status: Not Compliant

IXP28XX Network Processor
Slowport
7.2
Summary
The address latching control logic for the PROM and microprocessor ports is essentially the same;
the only difference is the PROM port constant fixed size (24 bits) and the latching of the PROM
port during three consecutive clock cycles.
For the microprocessor port, the size of the address is programmable via the SP_ADC register.
Depending on the programmed size of the address, this could be 8 to 25 bits, which will require one
to four cycles to latch. In our example, we used the 25-bit case because this is a complete
implementation and can be easily modified to support the other three values.
The data packing/unpacking logic examples were chosen to provide an interface to an
Intel/AMCC* device. While the other modes have subtle protocol and interface signal differences,
the logic used for address latching and data packing/unpacking should be essentially the same.
Again, the example uses the 32-bit case because this is a complete implementation and can be
easily modified to support 8- or 16-bit devices.
Some minor changes may be required for the control logic; however the general concept remains
unchanged as it uses the same combination of F377 flip-flops and F646 Octal registers for the glue
logic in all modes.
Hardware Design Guide
145