RPIXP2850BB Intel, RPIXP2850BB Datasheet - Page 67

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RPIXP2850BB

Manufacturer Part Number
RPIXP2850BB
Description
Manufacturer
Intel
Datasheet

Specifications of RPIXP2850BB

Operating Supply Voltage (typ)
1.3/1.5/2.5/3.3V
Operating Supply Voltage (max)
1.575/2.7/3.465V
Operating Supply Voltage (min)
1.235/2.3/3.135V
Mounting
Surface Mount
Operating Temperature (max)
70C
Operating Temperature (min)
0C
Operating Temperature Classification
Commercial
Lead Free Status / Rohs Status
Not Compliant
Table 19.
Figure 29.
Hardware Design Guide
QDR Address Signal Group Routing Guidelines
1.
Figure 29
QDR Address Signal Trace Width/Spacing Routing
Signal Group
Topology
Reference Plane
Characteristic Trace Impedance
RTT
Nominal Trace Width
Nominal Trace Separation
Group Spacing
Trace length P
Trace length B, C
Trace length D
Trace length E, F
Maximum via count per signal
Length tuning method
P refers to the package length.
Main Trunk
Branches
Main Trunk
Arms of the T
T
signal
illustrates routing for a QDR address signal trace width/spacing.
T
T
d2
d1
1
Parameter
+A to SRAMs
Signals
Other
20 mil or larger
Address
Balanced-T topology
Ground
34 Ω ±5%
60 Ω ±5%
35 Ω ±1%
10 mils
3.5 mils
15 - 20 mils
Isolation from all other signals is 20 - 25mils.
Should be matched to K-Clk trace length minus 0.9 inches.
Maximum = 11.0 inches
Trace length from ball to ball for all Address nets should be
matched for the entire group to within 25 mils.
As short as possible; B and C should match.
Maximum B + E = 1.0 inches
Maximum C + F = 1.0 inches
As short as possible; Maximum = 100 mils
As short as possible.
Maximum B + E = 1.0 inches
Maximum C + F = 1.0 inches
As small as possible; Maximum = 12 vias
All address signals matched within ±25 mils, where length
includes package length compensation (P+A)
Prepreg
POWER or GND Plane
POWER or GND Plane
ADDRESS
Signa
W
Routing Guideline
IXP28XX Network Processor
S
ADDRESS
Signal
W
QDR SRAM
D2
D1
3993-01
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