RPIXP2850BB Intel, RPIXP2850BB Datasheet - Page 74

• Manufacturer Part Number: RPIXP2850BB
• Manufacturer: Intel

Specifications of RPIXP2850BB

• Operating Supply Voltage (typ): 1.3/1.5/2.5/3.3V
• Operating Supply Voltage (max): 1.575/2.7/3.465V
• Operating Supply Voltage (min): 1.235/2.3/3.135V
• Mounting: Surface Mount
• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Operating Temperature Classification: Commercial
• Lead Free Status / Rohs Status: Not Compliant

IXP28XX Network Processor
QDR SRAM
4.5.6
Figure 36.
Table 27.
74
It is important to mention that the above two formulas are not independent but rather interrelated
and must be satisfied simultaneously. If adjustments are made to the lengths or topologies of these
signals then it is strongly recommended that simulations are performed to ensure that the signals
are properly aligned.
QDR SRAM C, C#, CIN, CIN# Clock Topologies
This output clock pair provides a user-controlled means of tuning SRAM device output data. The
rising edge of C is used as the output timing reference for first output data. The rising edge of C# is
used as the output reference for second output data. Ideally, C# is 180 degrees out of phase with C.
Figure 36
QDR C, C#, CIN, and CIN# Routing Topology
Table 27
QDR C, C#, CIN, and CIN# Signal Group Routing Guidelines (Sheet 1 of 2)
Signal Group
Topology
Reference Plane
Characteristic Trace Impedance
RTT
Nominal Trace Width
Nominal Trace Separation
Group spacing
provides routing guidelines for the QDR C, C#, CIN, and CIN# signal groups.
illustrates the routing topology for QDR C, C#, CIN, and CIN#.
C, C# and CIN, CIN#
IXP2800 Receiver
On-Die Termination
IXP2800 Driver
C-Clk signal
Cout - Clock
Cin - Clock
CIN, CIN#
Parameter
C, C#
Intel
Intel
®
®
B
A
C, C#, CIN, CIN#
Point-to-Point
Ground
50 Ω ±10%
50 Ω ±1% on-die termination at IXP28XX receiver
5 mils
20 - 25 mils
Isolation from all other signals is 20 mils
Routing Guideline
Hardware Design Guide
Top SRAM
Bottom SRAM
B3957-01