CY7C53120L8-44AXI Cypress Semiconductor Corp, CY7C53120L8-44AXI Datasheet - Page 6

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CY7C53120L8-44AXI

Manufacturer Part Number
CY7C53120L8-44AXI
Description
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of CY7C53120L8-44AXI

Mounting
Surface Mount
Operating Temperature (max)
85C
Operating Temperature (min)
-40C
Operating Temperature Classification
Industrial
Lead Free Status / Rohs Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CY7C53120L8-44AXI
Quantity:
5 000
Document #: 38-10002 Rev. *E
RXD is used to receive serial data at the specified baud rate.
TXD is used to transmit data serially at the specified baud rate.
The idle state of the TXD and RXD lines is high. All data bytes
begin with a start bit which is a ‘0’; this is followed by eight or
nine bits of data, LSB first, and end with a stop bit which is a
return to the idle state of ‘1.’ The number of bits transmitted or
received is programmable between eight or nine bits. The
ninth bit can be used as a parity bit or as a second stop bit.
The maximum baud rate for the UART engine is 921.6 Kbaud
with 20-MHz input clock frequency and scales with frequency.
The UART can be programmed to run at most of the standard
UART baud rates.
Communications Port
The Neuron chip includes a versatile 5-pin communications
port that can be configured in three different ways. The
Communications port can operate at either 3.3V or 5V. The
Communication port can be made backward-compatible with
existing 5V transceivers by supplying a 5V supply to the CV
pin.
In Single-ended Mode, pin CP0 is used for receiving serial
data, pin CP1 for transmitting serial data, and pin CP2 enables
an external transceiver. Data is communicated using Differ-
ential Manchester encoding.
In Special Purpose Mode, pin CP0 is used for receiving serial
data, pin CP1 for transmitting serial data, pin CP2 transmits a
bit clock, and pin CP4 transmits a frame clock for use by an
external intelligent transceiver. In this mode, the external
transceiver is responsible for encoding and decoding the data
stream.
In Differential Mode, pins CP0 and CP1 form a differential
receiver with built-in programmable hysteresis and low-pass
filtering. Pins CP2 and CP3 form a differential driver. Serial
data is communicated using Differential Manchester encoding.
The following tables describe the communications port when
used in Differential Mode.
Operating the Communications Port at 5V
The 3.3V Neuron device has a 5V compatible communications
port. In order to operate the Communications port at 5V, CV
has to be supplied with 5V. In this case CLK2 output will still
be at 3.3V but a buffered copy of CLK2 can be obtained on
CP3 pin of the communications port. When the comm port is
in Single-ended Mode and the CV
buffered 5V version of CLK2 and the CP3 pin.
Notes:
10. CP0 and CP1 inputs each 0.60 Vp – p, 1.25 MHz sine wave 180° out of phase with each other as shown in Figure 8 V
11. t
7. Hysteresis values are on the condition that the input signal swing is 200 mV greater than the programmed value.
8. The maximum data rate for the differential transceiver is 1.25 Mbps.
9. Receiver input, V
PLH
: Time from input switching states from low to high to output switching states. t
V
DD
CP0
CP1
Figure 1. Receiver Input Waveform
/2
D
= V
CP0
V
– V
CP0 – CP1
hys
CP1
+ 200 mV
, at least 200 mV greater than hysteresis levels. See Figure 1.
≤ 3 ns
DD
is at 5V, there will be a
DD
DD
PHL
Programmable Hysteresis Values (3.3V) (Expressed as
differential peak-to-peak voltages in terms of V
Programmable Hysteresis Values (5V) (Expressed as differ-
ential peak-to-peak voltages in terms of V
Programmable Glitch Filter Values
filter values expressed as transient pulse suppression times)
Receiver
across hysteresis)
Differential Receiver (End-to-End) Absolute Symmetry
Filter (F) Hysteresis (H)
Hysteresis
Hysteresis
: Time from input switching states from high to low to output switching states.
Filter (F)
0
Filter (F)
0
1
2
3
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
0
1
2
3
[9]
(End-to-End) Absolute Asymmetry (Worst-case
[7]
[7]
0
Min.
120
240
480
0.019 V
0.038 V
0.057 V
0.076 V
0.095 V
0.133 V
0.152 V
0.019 V
0.040 V
0.061 V
0.081 V
0.101 V
0.121 V
0.142 V
0.162 V
0.114 V
V
V
10
hys
hys
Min.
Min.
Max (
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
1500
Typ.
= 5V, Figure 9 V
410
800
Max (
75
t
PLH
150
250
400
0.027 V
0.054 V
0.081 V
0.108 V
0.135 V
0.162 V
0.189 V
0.216 V
0.027 V
0.054 V
0.081 V
0.108 V
0.135 V
0.162 V
0.189 V
0.216 V
35
V
V
hys
hys
CY7C53120L8
[8]
– t
CY7C53150L
(Receiver (end-to-end)
t
Typ.
Typ.
PHL
PLH
DD
24
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
)
Max.
1350
2600
140
700
– t
DD
)
DD
PHL
= 3.3V.
)
Page 6 of 14
0.035 V
0.070 V
0.105 V
0.140 V
0.175 V
0.210 V
0.245 V
0.280 V
0.035 V
0.068 V
0.101 V
0.135 V
0.169 V
0.203 V
0.236 V
0.270 V
V
V
hys
hys
)
Max.
Max.
Unit
Unit
[10, 11]
ns
ns
ns
ns
ns
ns
ns
ns
Unit
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
ns

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