PRIXP425ABC 885156 Intel, PRIXP425ABC 885156 Datasheet - Page 36

• Manufacturer Part Number: PRIXP425ABC 885156
• Manufacturer: Intel

Specifications of PRIXP425ABC 885156

• Lead Free Status / Rohs Status: Supplier Unconfirmed

3.5.1
Table 8.
3.5.2
3.6
Intel
Hardware Design Guidelines
36
®
IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor
GPIO Interface Signals
GPIO Interface Signals
Design Notes
The drive strength for GPIO[15:14] is only 8 mA, so LEDs driven by these signals are
not as bright. The drive strength for GPIO [13:0] is 16 mA.
I
To provide a simple, bidirectional, two-wire serial interface called the I
standardized peripheral bus connection bus can be used. While the IXP42X product line
and IXC1100 control plane processors do not possess dedicated on-chip I
hardware, this I
pins.
Figure 11
EEPROM, 7-bit addressing mode (Philips* PC8582C-2T/03) using two processors’ GPIO
pins (GPIO6 and GPIO7).
Note:
2
GPIO[12:0]
GPIO[13]
GPIO[14]
GPIO[15]
C Interface
Name
Intel
For explanations of the
shows the schematic for connecting the I
®
IXP42X product line and IXC1100 control plane processors—General Hardware Design
Type*
2
I/O
I/O
I/O
I/O
C-bus can be simulated by software control of two processors’ GPIO
General-purpose input/output pins. May be configured as an input or an output.
As an input, each signal may be configured as processor interrupts. After reset,
configured as inputs by default.
When not being used, pulled high with a 10-kΩ resistor.
General-purpose input/output pins can be configured as an input or an output.
Default after reset is to be configured as inputs.
When not being used, pulled high with a 10-kΩ resistor.
General-purpose input/output pins can be configured similar to GPIO pin 13 or as
a clock output. Configuration as an output clock can be set at various speeds of
up to 33 MHz with various duty cycles. Configured as an input, upon reset.
When not being used, pulled high with a 10-kΩ resistor.
General-purpose input/output pins can be configured similar to GPIO pin 13 or as
a clock output. Configuration as an output clock can be set at various speeds of
up to 33 MHz with various duty cycles. GPIO Pin 15 is configured as an output,
upon reset. GPIO Pin 15 can be used to clock the expansion interface, after reset.
When not being used, pulled high with a 10-kΩ resistor.
Type
column abbreviations, see
Description
2
C interface to a 256-byte I
Table 21 on page
Document Number: 252817-008US
81.
2
C, a
2
Considerations
C support
December 2007
2
C