PRIXP423ABD Intel, PRIXP423ABD Datasheet - Page 23
Manufacturer Part Number
Specifications of PRIXP423ABD
Core Operating Frequency
Operating Temperature (max)
Operating Temperature (min)
Operating Temperature Classification
Lead Free Status / Rohs Status
High-Speed, Serial Interfaces
The high-speed, serial interfaces are six-signal interfaces that support serial transfer
speeds from 512 KHz to 8.192 MHz, for some models of the IXP42X product line and
IXC1100 control plane processors. (See
Each interface allows direct connection of up to four T1/E1 framers and CODEC/SLICs
to the IXP42X product line and IXC1100 control plane processors. The high-speed,
serial interfaces are capable of supporting various protocols, based on the
implementation of the code developed for the network processor engine. For a list of
supported protocols, see the Intel
High-Speed and Console UARTs
The UART interfaces are 16550-compliant UARTs with the exception of transmit and
receive buffers. Transmit and receive buffers are 64 bytes-deep versus the 16 bytes
required by the 16550 UART specification.
The interface can be configured to support speeds from 1,200 baud to 921 Kbaud. The
interface support configurations of:
The request-to-send (RTS_N) and clear-to-send (CTS_N) modem control signals also
are available with the interface for hardware flow control.
16 GPIO pins are supported by the IXP42X product line and IXC1100 control plane
processors. GPIO pins 0 through 15 can be configured to be general-purpose input or
general-purpose output. Additionally, GPIO pins 0 through 12 can be configured to be
an interrupt input.
GPIO Pin 14 and GPIO 15 can also be configured as a clock output. The output-clock
configuration can be set at various speeds, up to 33.33 MHz, with various duty cycles.
GPIO Pin 14 is configured as an input, upon reset. GPIO Pin 15 is configured as an
output, upon reset. GPIO Pin 15 can be used to clock the expansion interface, after
Internal Bus Performance Monitoring Unit (IBPMU)
The IXP42X product line and IXC1100 control plane processors consists of seven 27-bit
counters that may be used to capture predefined durations or occurrence events on the
North AHB, South AHB, or SDRAM controller page hits/misses.
The IXP42X product line and IXC1100 control plane processors consists of 32 interrupt
sources to allow an extension of the Intel XScale
sources. These sources can originate from some external GPIO pins or internal
The interrupt controller can configure each interrupt source as an FIQ, IRQ, or disabled.
The interrupt sources tied to Interrupt 0 to 7 can be prioritized. The remaining
interrupts are prioritized in ascending order. For example, Interrupt 8 has a higher
priority than 9, 9 has a higher priority than 10, and 30 has a higher priority that 31.
• Five, six, seven, or eight data-bit transfers
• One or two stop bits
• Even, odd, or no parity
IXP42X product line and IXC1100 control plane processors
IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor
IXP400 Software Programmer’s Guide.
Table 4 on page
processor FIQ and IRQ interrupt