TXC-06312BIOG Transwitch Corporation, TXC-06312BIOG Datasheet - Page 43

• Manufacturer Part Number: TXC-06312BIOG
• Manufacturer: Transwitch Corporation

Specifications of TXC-06312BIOG

• Lead Free Status / Rohs Status: Supplier Unconfirmed

4 3 o f 2 0 2
TCK
TDI
TDO
TMS
TRS
BYPRXCLK
BYPRXSEQ
BYPRXDATA07
BYPRXDATA06
BYPRXDATA05
BYPRXDATA04
BYPRXDATA03
BYPRXDATA02
BYPRXDATA01
BYPRXDATA00
Symbol
Symbol
Lead No.
BOUNDARY SCAN
SDH/SONET RECEIVE BYPASS INTERFACE
D6
C5
B4
A3
B5
Lead No.
AA2
AA3
AA1
W5
W3
W2
Y4
Y3
Y2
V4
I/O/P
O(T)
I
I
I
I
I/O/P
LVCMOS
LVTTLp
LVTTLp
LVTTLp
LVTTLp
I
I
I
Type
4mA
- Lead Descriptions -
LVTTL
LVTTL
LVTTL
Type
Test Boundary Scan Clock: This signal is used to shift data
into TDI on its rising edge and out of TDO on its falling edge.
The maximum clock frequency is 10 MHz.
Test Boundary Scan Data Input: Serial test instructions and
data are clocked into this lead on the rising edge of TCK. This
lead has an internal pull-up resistor.
Test Boundary Scan Data Output: Serial test instructions and
data are clocked onto this lead on the falling edge of TCK.
When inactive, this lead goes into a high impedance state.
Test Boundary Scan Mode Select: This input lead is sampled
on the rising edge of TCK. It is used to place the Test Access
Port controller into various states, as defined in [IEEE 1149.1].
This lead has an internal pull-up resistor.
Test Boundary Scan Reset: An active low signal that asyn-
chronously resets the Test Access Port controller.
The reset must be present for a minimum of 250 ns. This lead
has an internal pull-up resistor and must be tied to VSS for nor-
mal operation.
Receive Line Bypass Clock:
For TranSwitch testing purposes.
This lead must be tied to VSS.
Receive Line Bypass Sequence:
For TranSwitch testing purposes.
This lead must be tied to VSS.
Receive Line Bypass Data:
For TranSwitch testing purposes.
These leads must be tied to VSS.
Name/Function
Name/Function
PRELIMINARY TXC-06312B-MB, Ed. 2
PHAST-12N Device
DATA SHEET
TXC-06312B
June 2005