MT45W2MW16BGB-708 IT TR Micron Technology Inc, MT45W2MW16BGB-708 IT TR Datasheet - Page 23
MT45W2MW16BGB-708 IT TR
Manufacturer Part Number
MT45W2MW16BGB-708 IT TR
Description
Manufacturer
Micron Technology Inc
Datasheet
1.MT45W2MW16BGB-708_IT_TR.pdf
(61 pages)
Specifications of MT45W2MW16BGB-708 IT TR
Operating Temperature (max)
85C
Operating Temperature (min)
-40C
Mounting
Surface Mount
Operating Temperature Classification
Industrial
Lead Free Status / Rohs Status
Compliant
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Figure 16:
PDF: 09005aef82832fa2/Source: 09005aef82832f5f
32mb_burst_cr1_0_p24z_2.fm - Rev. E 9/08 EN
(except A19)
DQ[15:0]
LB#/UB#
A[20:0]
A[19]
ADV#
WAIT
WE#
OE#
CLK
CRE
CE#
Synchronous Mode Configuration Register READ Followed by READ ARRAY Operation
2
Notes:
High-Z
Latch control register value
t CSP
1. Nondefault BCR settings for synchronous mode register READ followed by READ ARRAY
2. A[19] = LOW to read RCR, HIGH to read BCR.
3. CE# must remain LOW to complete a burst-of-one READ. WAIT must be monitored—addi-
t CEW
t SP
t SP
t SP
t SP
operation: latency code 2 (3 clocks); WAIT active LOW; WAIT asserted during delay.
tional WAIT cycles caused by refresh collisions require a corresponding number of addi-
tional CE# LOW cycles.
t HD
t HD
t HD
32Mb: 2 Meg x 16 Async/Page/Burst CellularRAM 1.0 Memory
t ABA
t OLZ
Latch control register address
t BOE
t ACLK
Valid
CR
23
t KOH
t HD
Micron Technology, Inc., reserves the right to change products or specifications without notice.
t CBPH
t HZ
t OHZ
High-Z
3
Address
Address
Configuration Registers
Don’t Care
©2007 Micron Technology, Inc. All rights reserved.
Undefined
Valid
data
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