5962-9051801MEA Intersil, 5962-9051801MEA Datasheet

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5962-9051801MEA

Manufacturer Part Number
5962-9051801MEA
Description
Manufacturer
Intersil
Datasheet

Specifications of 5962-9051801MEA

Function
Rate Generator
Operating Temperature (max)
125C
Operating Temperature (min)
-55
Package Type
CDIP
Pin Count
14
Mounting
Through Hole
Lead Free Status / Rohs Status
Not Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
5962-9051801MEA
Manufacturer:
INTERS
Quantity:
912
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CMOS Programmable Bit Rate Generator
Ordering Information
The HD-4702 Bit Rate Generator provides the necessary clock signals for digital data transmission
systems, such as a UART. It generates 13 commonly used bit rates using an on -chip crystal
oscillator or an external input. For conventional operation generating 16 output clock pulses per bit
period, the input clock frequency must be 2.4576MHz (i.e. 9600 Baud x 16 x 16, since there is an
internal ÷ 16 prescaler). A lower input frequency will result in a proportionally lower output frequency.
The HD-4702 can provide multi -channel operation with a minimum of external logic by having the
clock frequency CO and the ÷ 8 prescaler outputs Q0, Q1, Q2 available externally. All signals have a
50% duty cycle except 1800 Baud, which has less than 0.39% distortion.
The four rate select inputs (S0 -S3) select which bit rate is at the output (Z). See Truth Table for Rate
Select Inputs for select code and output bit rate. Two of the 16 select codes for the HD -4702 do not
select an internally generated frequency, but select an input into which the user can feed either a
different frequency, or a static level (High or Low) to generate “ZERO BAUD”. The bit rates most
commonly used in modern data terminals
than one input be grounded for the HD -4702, which is easily achieved with a single 5 -position switch.
The HD-4702 has an initialization circuit which generates a master
signal is derived from a digital differentiator that senses the first high level on the CP input after the
ECP input goes low. When ECP is high, selecting the crystal input, CP must be low. A high level on
CP would apply a continuous reset. See Clock Modes and Initialization below.
Related Documentation
Features
Data Frame Length
Data Rate
The price listed is the manufacturer's suggested retail price for quantities
between 100 and 999 units. However, prices in today's market are fluid and may
change without notice.
MSL = Moisture Sensitivity Level - per IPC/JEDEC J-STD-020
SMD = Standard Microcircuit Drawing
HD-4702
Intersil
Part No.
5962 -9051801MEA
HD3-4702 -9
HD3-4702 -9Z
HD-15530
HD-15531
HD-6408
HD-6409
HS-3182
HS-3282
Description
Key Features
Parametric Data
Application Block Diagrams
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HD-4702 Provides 13 Commonly Used Bit Rates
Uses a 2.4576MHz Crystal/Input for Standard Frequency Output (16 Times Bit Rate)
Low Power Dissipation
Conforms to EIA RS-404
One HD-4702 Controls up to Eight Transmission Channels
Initialization Circuit Facilitates Diagnostic Fault Isolation
On-Chip Input Pull -Up Circuit
CMOS Programmable Bit Rate Generator
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Low Power Dissipation
Conforms to EIA RS-404
One HD-4702 Controls up to Eight Transmission Channels
Initialization Circuit Facilitates Diagnostic Fault Isolation
On-Chip Input Pull -Up Circuit
N/A
N/A
Temp.
Ind
Ind
Mil
Key
Features
(110, 150, 300, 1200, 2400 Baud) require that no more
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Intranet
16 Ld PDIP
16 Ld PDIP
Package
Parametric
Data
MSL
N/A
N/A
N/A
reset for the scan counter. This
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Price
30.99
US $
6.77
6.77
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Parametric Table
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