LM4817MH National Semiconductor, LM4817MH Datasheet - Page 17

• Manufacturer Part Number: LM4817MH
• Manufacturer: National Semiconductor

Specifications of LM4817MH

• Operational Class: Class-AB
• Audio Amplifier Output Configuration: 2-Channel Stereo
• Output Power (typ): 1.1x2@8OhmW
• Audio Amplifier Function: Speaker
• Total Harmonic Distortion: 0.13@8Ohm@1W%
• Single Supply Voltage (typ): 5V
• Dual Supply Voltage (typ): Not RequiredV
• Power Supply Requirement: Single
• Rail/rail I/o Type: No
• Power Supply Rejection Ratio: 67dB
• Single Supply Voltage (min): 3V
• Single Supply Voltage (max): 5.5V
• Dual Supply Voltage (min): Not RequiredV
• Dual Supply Voltage (max): Not RequiredV
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 28
• Package Type: TSSOP EP
• Lead Free Status / Rohs Status: Not Compliant

Application Information
the error amplifier. The second term expresses the zero
(numerator) and pole (denominator) of the load in combina-
tion with the R
Figure 5 shows a Bode plot that represents a case where the
zero contributed by the load is too high to cancel the effect of
the pole contributed by the load and R
illustrates the loop gain while the dashed line illustrates the
corresponding phase shift. Notice that the phase shift at
unity gain is a total 360˚ -the criteria for oscillation.
The LDO generates an internal zero that makes up for the
inadequately high zero of the low ESR ceramic output ca-
pacitor. This internally generated zero is strategically placed
to provide positive phase shift near unity gain, thus providing
a stable phase margin.
No-Load Stability
The LM4817 remains stable during no-load conditions, a
necessary feature for CMOS RAM keep-alive applications.
Input Capacitor
The LM4817 requires a minimum input capacitance of about
1µF. The value may be increased indefinitely. The type is not
critical to stability. However, instability may occur with bench
set-ups where long supply leads are used, particularly at
near dropout and high current conditions. This is attributed to
the lead inductance coupling to the output through the gate
oxide of the pass transistor; thus, forming a pseudo LCR
network within the Loop-gain. A 10µF tantalum input capaci-
tor remedies this non-situ condition; its larger ESR acts to
dampen the pseudo LCR network. This may only be neces-
sary for some bench setups. 1µF ceramic input capacitor are
fine for most end-use applications.
If a tantalum input capacitor is intended for the final applica-
tion, it is important to consider their tendency to fail in short
circuit mode, thus potentially damaging the part.
Noise Bypass Capacitor
The noise bypass capacitor (CC) significantly reduces the
LDO’soutput noise. Connect the CC capacitor between pin 6
and ground. The optimum value for CC is 33nF.
Inadequately High Zero for Stability Compensation
FIGURE 5. Loop Gain Bode Plot Illustrating
O
of the regulator.
(Continued)
O
. The solid line
200781B8
17
Pin 6 directly connects to the high impedance output of the
bandgap. The DC leakage of the CC capacitor should be
considered; loading down the reference will reduce the out-
put voltage. NPO and COG ceramic capacitors typically offer
very low leakage. Polypropylene and polycarbonate film car-
bonate capacitor offer even lower leakage currents.
CC does not affect the transient response; however, it does
affect turn-on time. The smaller the CC value, the quicker the
turn-on time.
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