ATF1508ASVL-20JU84 Atmel, ATF1508ASVL-20JU84 Datasheet

Page 1

... Pull-up Option on JTAG Pins TMS and TDI • Advanced Power Management Features – Edge-controlled Power-down “L” – Individual Macrocell Power Option – Disable ITD on Global Clocks, Inputs and I/O for “Z” Parts High- performance EE PLD ATF1508ASV ATF1508ASVL Rev. 1408H–PLD–7/05 1 ...

Page 2

PLCC Top View I/O/PD1 12 VCCIO 13 I/O/TDI 14 I/O 15 I/O 16 I/O 17 I/O 18 GND 19 I/O 20 I/O 21 I/O 22 I/O/TMS 23 I/O 24 I/O 25 VCCIO 26 I/O 27 I/O 28 I/O 29 ...

Page 3

Block Diagram 1408H–PLD–7/05 ATF1508ASV(L) 3 ...

Page 4

... The ATF1508ASV( high-performance, high-density complex programmable logic device (CPLD) that utilizes Atmel’s proven electrically-erasable technology. With 128 logic macrocells and up to 100 inputs, it easily integrates logic from several TTL, SSI, MSI, LSI and classic PLDs. The ATF1508ASV(L)’s enhanced routing switch matrices increase usable gate count and increase odds of successful pin-locked design modifications ...

Page 5

Flip-flop Figure 1. ATF1508ASV(L) Macrocell 1408H–PLD–7/05 The ATF1508ASV(L)’s flip-flop has very flexible data and control functions. The data input can come from either the XOR gate, from a separate product term or directly from the I/O pin. Selecting the separate ...

Page 6

Extra Feedback I/O Control Global Bus/Switch Matrix Foldback Bus Open-collector Output Option ATF1508ASV(L) 6 The ATF15xxSE Family macrocell output can be selected as registered or combinato- rial. The extra buried feedback signal can be either combinatorial or a registered signal ...

Page 7

Programmable Pin- keeper Option for Inputs and I/Os Speed/Power Management 1408H–PLD–7/05 The ATF1508ASV(L) offers the option of programming all input and I/O pins so that “pin- keeper” circuits can be utilized. When any pin is driven high or low and ...

Page 8

... Large. To ensure a robust operating environment in applications where the device is operated near 3.0V, Atmel recommends that during the fitting process users configure the device with the Power-up Reset hysteresis set to Large. For conversions, Atmel POF2JED users should include the flag “-power_reset” on the command line after “file- name.POF” ...

Page 9

... To allow ISP programming support by the Automated Test Equipment (ATE) vendors, Serial Vector Format (SVF) files can be created by the Atmel ISP software. Conversion to other ATE tester format beside SVF is also possible ATF1508ASV(L) devices can also be programmed using standard third-party program- mers ...

Page 10

DC and AC Operating Conditions Operating Temperature (Ambient) V (3.3V) Power Supply CC DC Characteristics Symbol Parameter Input or I/O Low I IL Leakage Current Input or I/O High I IH Leakage Current Tri-State Output I OZ Off-State Current Power ...

Page 11

Absolute Maximum Ratings* Temperature Under Bias.................................. -40°C to +85°C Storage Temperature ..................................... -65°C to +150°C Voltage on Any Pin with Respect to Ground .........................................-2.0V to +7.0V Voltage on Input Pins with Respect to Ground During Programming.....................................-2.0V to +14.0V Programming Voltage ...

Page 12

AC Characteristics Symbol Parameter t Input or Feedback to Non-registered Output PD1 t I/O Input or Feedback to Non-registered Feedback PD2 t Global Clock Setup Time SU t Global Clock Hold Time H t Global Clock Setup Time of ...

Page 13

AC Characteristics (Continued) Symbol Parameter Output Buffer Enable Delay t ZX2 (Slow slew rate = OFF; V Output Buffer Enable Delay t ZX3 (Slow slew rate = ON; V Output Buffer Disable Delay pF) ...

Page 14

Power-down Mode Power Down AC Characteristics Symbol Parameter t Valid I, I/O before PD High IVDH (2) t Valid OE before PD High GVDH (2) t Valid Clock before PD High CVDH t I, I/O Don’t Care after PD High ...

Page 15

JTAG-BST Overview JTAG Boundary-scan Cell (BSC) Testing BSC Configuration Pins and Macrocells (Except JTAG TAP Pins) Note: The ATF1508ASV(L) has pull-up option on TMS and TDI pins. This feature is selected as a design option. 1408H–PLD–7/05 The JTAG-BST (JTAG boundary-scan ...

Page 16

... BSC Configuration for Macrocell OEJ OUTJ TDI ATF1508ASV(L) 16 These are now available in all package types via the Atmel web site. These models can be used for Boundary-scan Test Operation in the ATF1508ASV(L) and have been scheduled to conform to the IEEE 1149.1 standard. Pin BSC 0 Pin ...

Page 17

ATF1508ASV(L) Dedicated Pinouts Dedicated Pin 84-lead J-lead INPUT/OE2/GCLK2 INPUT/GCLR INPUT/OE1 INPUT/GCLK1 I/O/GCLK3 I/O/PD (1, 2) I/O/TDI(JTAG) I/O/TMS(JTAG) I/O/TCK(JTAG) I/O/TDO(JTAG) 7,19,32,42, GND 47,59,72,82 3,13,26,38, VCC 43,53,66,78 N SIGNAL PINS # USER I/O PINS OE (1, 2) Global OE pins ...

Page 18

ATF1508ASV(L) I/O Pinouts 84-lead 100-lead MC PLB J-lead PQFP PD1 ...

Page 19

ATF1508ASV(L) I/O Pinouts (Continued) 84-lead 100-lead MC PLB J-lead PQFP PD2 ...

Page 20

SUPPLY CURRENT VS. SUPPLY VOLTAGE (T = 25° 200 STANDARD POWER 100 0 2.50 2.75 3.00 3.25 SUPPLY VOLTAGE (V) SUPPLY CURRENT VS. FREQUENCY STANDARD POWER (T A 250.0 200.0 STANDARD POWER 150.0 100.0 REDUCED POWER ...

Page 21

OUTPUT SOURCE CURRENT VS. SUPPLY VOLTAGE (V = 2.4V -10 -12 -14 -16 2.75 3.00 3.25 3.50 SUPPLY VOLTAGE (V) OUTPUT SINK CURRENT VS. SUPPLY VOLTAGE ( ...

Page 22

... ATF1508ASV-15 QC160 ATF1508ASV-15 JI84 ATF1508ASV-15 QI100 ATF1508ASV-15 AI100 ATF1508ASV-15 QI160 ATF1508ASVL-20 JC84 ATF1508ASVL-20 QC100 ATF1508ASVL-20 AC100 ATF1508ASVL-20 QC160 ATF1508ASVL-20 JI84 ATF1508ASVL-20 QI100 ATF1508ASVL-20 AI100 ATF1508ASVL-20 QI160 by 15%. CC Ordering Code ATF1508ASV-15 JU84 ATF1508ASV-15 AU100 ATF1508ASVL-20 JU84 ATF1508ASVL-20 AU100 Package Type Package Operation Range ...

Page 23

Packaging Information 84J – PLCC 1.14(0.045) X 45˚ 0.51(0.020)MAX 45˚ MAX (3X) Notes: 1. This package conforms to JEDEC reference MS-018, Variation AF. 2. Dimensions D1 and E1 do not include mold protrusion. Allowable protrusion is .010"(0.254 mm) ...

Page 24

PQFP PIN 1 ID PIN 0º~7º C 2325 Orchard Parkway San Jose, CA 95131 R ATF1508ASV( TITLE 100Q1, 100-lead Body, 3.2 mm Footprint, ...

Page 25

TQFP PIN 0˚~7˚ L Notes: 1. This package conforms to JEDEC reference MS-026, Variation AED. 2. Dimensions D1 and E1 do not include mold protrusion. Allowable protrusion is 0.25 mm per side. Dimensions D1 and ...

Page 26

PQFP Dimensions in Millimeters and (Inches). Controlling dimension: Millimeters. JEDEC Standard MS-022 DC-1 PIN 1 ID 0.65(0.0256)BSC 0.23(0.009) 0.11(0.004) 2325 Orchard Parkway San Jose, CA 95131 R ATF1508ASV(L) 26 31.45(1.238) SQ 30.95(1.218) PIN 1 28.10(1.106) SQ 27.90(1.098) 0º~7º ...

Page 27

Revision History 1408H–PLD–7/05 Revision Comments Corrected list of last buy parts. 1408H Green package options added. 1408G ATF1508ASV(L) 27 ...

Page 28

... Disclaimer: The information in this document is provided in connection with Atmel products. No license, express or implied, by estoppel or otherwise, to any intellectual property right is granted by this document or in connection with the sale of Atmel products. EXCEPT AS SET FORTH IN ATMEL’S TERMS AND CONDI- TIONS OF SALE LOCATED ON ATMEL’S WEB SITE, ATMEL ASSUMES NO LIABILITY WHATSOEVER AND DISCLAIMS ANY EXPRESS, IMPLIED OR STATUTORY WARRANTY RELATING TO ITS PRODUCTS INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT ...