EP1K10TC100-3 Altera, EP1K10TC100-3 Datasheet - Page 3

• Manufacturer Part Number: EP1K10TC100-3
• Description: IC ACEX 1K FPGA 10K 100-TQFP
• Manufacturer: Altera
• Series: ACEX-1K®r

Specifications of EP1K10TC100-3

• Number Of Logic Elements/cells: 576
• Number Of Labs/clbs: 72
• Total Ram Bits: 12288
• Number Of I /o: 66
• Number Of Gates: 56000
• Voltage - Supply: 2.375 V ~ 2.625 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 544-1027

Altera Corporation
Notes:
(1)
(2)
(3)
EP1K10
EP1K30
EP1K50
EP1K100
Pitch (mm)
Area (mm
Length
(mm
Table 2. ACEX 1K Package Options & I/O Pin Count
Table 3. ACEX 1K Package Sizes
Device
ACEX 1K device package types include thin quad flat pack (TQFP), plastic quad flat pack (PQFP), and FineLine
BGA packages.
Devices in the same package are pin-compatible, although some devices have more I/O pins than others. When
planning device migration, use the I/O pins that are common to all devices.
This option is supported with a 256-pin FineLine BGA package. By using SameFrame
BGA packages are pin-compatible. For example, a board can be designed to support 256-pin and 484-pin FineLine
BGA packages.
Device
mm)
width
2
)
100-Pin TQFP
100-Pin TQFP
66
16
0.50
256
16
Software design support and automatic place-and-route provided by
Altera development systems for Windows-based PCs and Sun
SPARCstation, and HP 9000 Series 700/800 workstations
Flexible package options are available in 100 to 484 pins, including
the innovative FineLine BGA
Additional design entry and simulation support provided by EDIF
2 0 0 and 3 0 0 netlist files, library of parameterized modules (LPM),
DesignWare components, Verilog HDL, VHDL, and other interfaces
to popular EDA tools from manufacturers such as Cadence,
Exemplar Logic, Mentor Graphics, OrCAD, Synopsys, Synplicity,
VeriBest, and Viewlogic
144-Pin TQFP
144-Pin TQFP
102
102
22
92
0.50
484
22
ACEX 1K Programmable Logic Device Family Data Sheet
208-Pin PQFP
208-Pin PQFP
Notes
30.6
120
147
147
147
0.50
936
(1),
30.6
TM
(2)
packages (see
FineLine BGA
FineLine BGA
256-Pin
256-Pin
17
136
171
186
186
289
1.0
TM
17
Tables 2
pin migration, all FineLine
FineLine BGA
FineLine BGA
and 3)
484-Pin
484-Pin
136
171
23
249
333
529
1.0
(3)
(3)
23
3
13