EP2C5T144I8N Altera, EP2C5T144I8N Datasheet - Page 88

IC CYCLONE II FPGA 5K 144-TQFP

EP2C5T144I8N

Manufacturer Part Number
EP2C5T144I8N
Description
IC CYCLONE II FPGA 5K 144-TQFP
Manufacturer
Altera
Series
Cyclone® IIr
Datasheet

Specifications of EP2C5T144I8N

Number Of Logic Elements/cells
4608
Number Of Labs/clbs
288
Total Ram Bits
119808
Number Of I /o
89
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
144-TQFP, 144-VQFP
Family Name
Cyclone® II
Number Of Logic Blocks/elements
4608
# I/os (max)
89
Frequency (max)
402.58MHz
Process Technology
90nm
Operating Supply Voltage (typ)
1.2V
Logic Cells
4608
Ram Bits
119808
Operating Supply Voltage (min)
1.15V
Operating Supply Voltage (max)
1.25V
Operating Temp Range
-40C to 100C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
144
Package Type
TQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Compliant
Other names
544-2139

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0
Power-On Reset Circuitry
4–6
Cyclone II Device Handbook, Volume 1
For Cyclone II devices, wake-up time consists of power-up, POR,
configuration, and initialization. The device must properly go through all
four stages to configure correctly and begin operation. You can calculate
wake-up time using the following equation:
Figure 4–3
Figure 4–3. Cyclone II Wake-Up Time
Note to
(1)
The V
characteristics and the power supply used in your system. The fast-on
devices require a maximum V
POR time of 12 ms.
Configuration time will depend on the configuration mode chosen and
the configuration file size. You can calculate configuration time by
multiplying the number of bits in the configuration file with the period of
the configuration clock. For fast configuration times, you should use
Passive Serial (PS) configuration mode with maximum DCLK frequency
of 100 MHz. In addition, you can use compression to reduce the
configuration file size and speed up the configuration time. The t
or t
1
Wake-Up Time = V
V
CC
Minimum
CD2UMC
V
CC
CC
Figure
ramp must be monotonic.
ramp time and POR time will depend on the device
For more information on the t
to the Configuring Cyclone II Devices chapter in the Cyclone II
Device Handbook.
illustrates the components of wake up time.
parameters will determine the initialization time.
Voltage
V
CC
Time
4–3:
Ramp
CC
Ramp Time + POR Time + Configuration Time + Initialization Time
POR Time
CC
ramp time of 2 ms and have a maximum
Configuration Time
CD2UM
or t
CD2UMC
Altera Corporation
parameters, refer
Initialization
Time
February 2007
CD2UM
Mode
User
Time

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