EPF6016TC144-3N Altera, EPF6016TC144-3N Datasheet - Page 13
![IC FLEX 6000 FPGA 16K 144-TQFP](/photos/6/70/67061/544-144-tqfp_sml.jpg)
EPF6016TC144-3N
Manufacturer Part Number
EPF6016TC144-3N
Description
IC FLEX 6000 FPGA 16K 144-TQFP
Manufacturer
Altera
Series
FLEX 6000r
Datasheet
1.EPF6010ATC100-3N.pdf
(52 pages)
Specifications of EPF6016TC144-3N
Number Of Logic Elements/cells
1320
Number Of Labs/clbs
132
Number Of I /o
117
Number Of Gates
16000
Voltage - Supply
4.75 V ~ 5.25 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
144-TQFP, 144-VQFP
Family Name
FLEX 6000
Number Of Usable Gates
16000
Number Of Logic Blocks/elements
1320
# I/os (max)
117
Frequency (max)
125MHz
Process Technology
SRAM
Operating Supply Voltage (typ)
5V
Logic Cells
1320
Device System Gates
16000
Operating Supply Voltage (min)
4.75V
Operating Supply Voltage (max)
5.25V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
144
Package Type
TQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Total Ram Bits
-
Lead Free Status / Rohs Status
Compliant
Other names
544-1956
EPF6016TC144-3N
EPF6016TC144-3N
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EPF6016TC144-3N
Manufacturer:
ALTERA42
Quantity:
1 341
Part Number:
EPF6016TC144-3N
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
Figure 6. Cascade Chain Operation
Altera Corporation
d[(4 n -1)..4( n -1)]
AND Cascade Chain
d[3..0]
d[7..4]
LUT
LUT
LUT
LE Operating Modes
The FLEX 6000 LE can operate in one of the following three modes:
■
■
■
Each of these modes uses LE resources differently. In each mode, seven
available inputs to the LE—the four data inputs from the LAB local
interconnect, the feedback from the programmable register, and the
carry-in and cascade-in from the previous LE—are directed to different
destinations to implement the desired logic function. LAB-wide signals
provide clock, asynchronous clear, synchronous clear, and synchronous
load control for the register. The Altera software, in conjunction with
parameterized functions such as LPM and DesignWare functions,
automatically chooses the appropriate mode for common functions such
as counters, adders, and multipliers. If required, the designer can also
create special-purpose functions to use an LE operating mode for optimal
performance.
Figure 7
Normal mode
Arithmetic mode
Counter mode
shows the LE operating modes.
LE n + 1
LE 2
LE 3
FLEX 6000 Programmable Logic Device Family Data Sheet
d[(4 n -1)..4( n -1)]
OR Cascade Chain
d[3..0]
d[7..4]
LUT
LUT
LUT
LE n + 1
LE 2
LE 3
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