EPF6016TC144-3N Altera, EPF6016TC144-3N Datasheet - Page 26
![IC FLEX 6000 FPGA 16K 144-TQFP](/photos/6/70/67061/544-144-tqfp_sml.jpg)
EPF6016TC144-3N
Manufacturer Part Number
EPF6016TC144-3N
Description
IC FLEX 6000 FPGA 16K 144-TQFP
Manufacturer
Altera
Series
FLEX 6000r
Datasheet
1.EPF6010ATC100-3N.pdf
(52 pages)
Specifications of EPF6016TC144-3N
Number Of Logic Elements/cells
1320
Number Of Labs/clbs
132
Number Of I /o
117
Number Of Gates
16000
Voltage - Supply
4.75 V ~ 5.25 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
144-TQFP, 144-VQFP
Family Name
FLEX 6000
Number Of Usable Gates
16000
Number Of Logic Blocks/elements
1320
# I/os (max)
117
Frequency (max)
125MHz
Process Technology
SRAM
Operating Supply Voltage (typ)
5V
Logic Cells
1320
Device System Gates
16000
Operating Supply Voltage (min)
4.75V
Operating Supply Voltage (max)
5.25V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
144
Package Type
TQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Total Ram Bits
-
Lead Free Status / Rohs Status
Compliant
Other names
544-1956
EPF6016TC144-3N
EPF6016TC144-3N
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EPF6016TC144-3N
Manufacturer:
ALTERA42
Quantity:
1 341
Part Number:
EPF6016TC144-3N
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
FLEX 6000 Programmable Logic Device Family Data Sheet
Output
Configuration
26
Figure 15. SameFrame Pin-Out Example
Table 6
feature.
This section discusses slew-rate control, the MultiVolt I/O interface,
power sequencing, and hot-socketing for FLEX 6000 devices.
Slew-Rate Control
The output buffer in each IOE has an adjustable output slew-rate that can
be configured for low-noise or high-speed performance. A slower
slew-rate reduces system noise and adds a maximum delay of 6.8 ns. The
fast slew-rate should be used for speed-critical outputs in systems that are
adequately protected against noise. Designers can specify the slew-rate on
a pin-by-pin basis during design entry or assign a default slew rate to all
pins on a device-wide basis. The slew-rate setting affects only the falling
edge of the output.
Table 6. 3.3-V FLEX 6000 Devices with SameFrame Pin-Outs
100-Pin FineLine BGA Package
EPF6016A
EPF6024A
lists the 3.3-V FLEX 6000 devices with the SameFrame pin-out
Device
(Reduced I/O Count or
Logic Requirements)
Designed for 256-Pin FineLine BGA Package
FineLine
100-Pin
BGA
100-Pin FineLine BGA
Printed Circuit Board
v
256-Pin FineLine BGA Package
(Increased I/O Count or
Logic Requirements)
FineLine
256-Pin
256-Pin FineLine BGA
BGA
Altera Corporation
v
v