EP3SL150F1152C3N Altera, EP3SL150F1152C3N Datasheet - Page 68
![IC STRATX III FPGA 150K 1152FBGA](/photos/6/72/67293/544-1152-fbga_sml.jpg)
EP3SL150F1152C3N
Manufacturer Part Number
EP3SL150F1152C3N
Description
IC STRATX III FPGA 150K 1152FBGA
Manufacturer
Altera
Series
Stratix® IIIr
Datasheets
1.EP3SL150F780C4N.pdf
(16 pages)
2.EP3SL150F780C4N.pdf
(332 pages)
3.EP3SL150F780C4N.pdf
(456 pages)
Specifications of EP3SL150F1152C3N
Number Of Logic Elements/cells
142500
Number Of Labs/clbs
5700
Total Ram Bits
6390
Number Of I /o
744
Voltage - Supply
0.86 V ~ 1.15 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
1152-FBGA
For Use With
544-2568 - KIT DEVELOPMENT STRATIX III
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Other names
544-2408
EP3SL150F1152C3NES
EP3SL150F1152C3NES
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP3SL150F1152C3N
Manufacturer:
ALTERA
Quantity:
490
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3–2
Figure 3–1. R4 Interconnect Connections
Notes to
(1) C4 and C12 interconnects can drive R4 interconnects.
(2) This pattern is repeated for every LAB in the LAB row.
Column Interconnects
Stratix III Device Handbook, Volume 1
Figure 3–1
interconnect. For R4 interconnects that drive to the right, the primary LAB and right
neighbor can drive to the interconnect. For R4 interconnects that drive to the left, the
primary LAB and its left neighbor can drive the interconnect. R4 interconnects can
drive other R4 interconnects to extend the range of LABs they drive. R4 interconnects
can also drive C4 and C12 (column interconnects) for connections from one row to
another. Additionally, R4 interconnects can drive R20 interconnects.
R20 row interconnects span 20 LABs and provide the fastest resource for row
connections between distant LABs, TriMatrix memory, DSP blocks, and row IOEs. R20
row interconnects drive LAB local interconnects via R4 and C4 interconnects. R20
interconnects can drive R20, R4, C12, and C4 interconnects.
The column interconnect operates similarly to the row interconnect. It vertically
routes signals to and from LABs, TriMatrix memory, DSP blocks, and IOEs. Each
column of LABs is served by a dedicated column interconnect. These column
interconnect resources include:
■
■
■
■
■
Shared arithmetic chain interconnects in a LAB and from LAB to LAB
Carry chain interconnects in a LAB and from LAB to LAB
Register chain interconnects in a LAB
C4 interconnects traversing a distance of four blocks in the same device column
C12 column interconnects for high-speed vertical routing through the device
R4 Interconnect
Driving Left
Adjacent LAB can
Drive onto Another
LAB's R4 Interconnect
(Note
Neighbor
LAB
1),
(2)
MLAB
C4 and C12
Column Interconnects (1)
Neighbor
Chapter 3: MultiTrack Interconnect in Stratix III Devices
LAB
R4 Interconnect
Driving Right
© October 2008 Altera Corporation
Column Interconnects
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