XC4VFX12-10FFG668C Xilinx Inc, XC4VFX12-10FFG668C Datasheet - Page 45

• Manufacturer Part Number: XC4VFX12-10FFG668C
• Description: IC FPGA VIRTEX-4 FX 12K 668FCBGA
• Manufacturer: Xilinx Inc
• Series: Virtex™-4r

Specifications of XC4VFX12-10FFG668C

• Total Ram Bits: 663552
• Number Of Logic Elements/cells: 12312
• Number Of Labs/clbs: 1368
• Number Of I /o: 320
• Voltage - Supply: 1.14 V ~ 1.26 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 668-BBGA, FCBGA
• No. Of Logic Blocks: 12312
• No. Of Macrocells: 12312
• No. Of Speed Grades: 10
• No. Of I/o's: 320
• Clock Management: DCM
• I/o Supply Voltage: 3.45V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: HW-V4-ML403-UNI-G - EVALUATION PLATFORM VIRTEX-4HW-AFX-FF668-400 - BOARD DEV VIRTEX 4 FF668
• Number Of Gates: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 122-1591; XC4VFX12-10FFG668C

Table 55: Global Clock Input to Output Delay for LVCMOS25 Standard, 12 mA, Fast Slew Rate, without DCM
DS302 (v3.7) September 9, 2009
Product Specification
Notes:
1.
LVCMOS25 Global Clock Input to Output Delay using Output Flip-Flop, 12 mA, Fast Slew Rate, without DCM.
T
ICKOF
Listed above are representative values where one global clock input drives one vertical clock line in each accessible column, and where all
accessible IOB and CLB flip-flops are clocked by the global clock net.
Symbol
Global Clock and OFF without DCM
Description
www.xilinx.com
Virtex-4 FPGA Data Sheet: DC and Switching Characteristics
XC4VFX100
XC4VFX140
XC4VLX100
XC4VLX160
XC4VLX200
XC4VSX25
XC4VSX35
XC4VSX55
XC4VFX12
XC4VFX20
XC4VFX40
XC4VFX60
XC4VLX15
XC4VLX25
XC4VLX40
XC4VLX60
XC4VLX80
Device
6.42
6.50
6.70
6.86
6.98
7.23
7.46
6.69
6.75
7.10
6.41
6.60
6.97
6.98
7.46
N/A
N/A
-12
Speed Grade
7.22
7.32
7.54
7.72
7.85
8.15
8.40
8.79
7.52
7.59
7.99
7.21
7.42
7.84
7.86
8.40
8.80
-11
8.14
8.25
8.50
8.70
8.85
9.18
9.46
9.88
8.47
8.56
9.00
8.13
8.37
8.83
8.85
9.45
9.90
-10
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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