EP2S90F1020I4N Altera, EP2S90F1020I4N Datasheet - Page 208

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EP2S90F1020I4N

Manufacturer Part Number
EP2S90F1020I4N
Description
IC STRATIX II FPGA 90K 1020-FBGA
Manufacturer
Altera
Series
Stratix® IIr
Datasheet

Specifications of EP2S90F1020I4N

Number Of Logic Elements/cells
90960
Number Of Labs/clbs
4548
Total Ram Bits
4520488
Number Of I /o
758
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
1020-FBGA
Family Name
Stratix II
Number Of Logic Blocks/elements
90960
# I/os (max)
758
Frequency (max)
711.24MHz
Process Technology
90nm (CMOS)
Operating Supply Voltage (typ)
1.2V
Logic Cells
90960
Ram Bits
4520488
Operating Supply Voltage (min)
1.15V
Operating Supply Voltage (max)
1.25V
Operating Temp Range
-40C to 100C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
1020
Package Type
FC-FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Compliant
Other names
544-1920
EP2S90F1020I4N

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EP2S90F1020I4N
Manufacturer:
ALTERA
Quantity:
450
Part Number:
EP2S90F1020I4N
Manufacturer:
ALTERA
Quantity:
531
Part Number:
EP2S90F1020I4N
Manufacturer:
Altera
Quantity:
10 000
Part Number:
EP2S90F1020I4N
Manufacturer:
ALTERA
0
Part Number:
EP2S90F1020I4N
Manufacturer:
ALTERA
Quantity:
500
Part Number:
EP2S90F1020I4N
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
Part Number:
EP2S90F1020I4N
0
Part Number:
EP2S90F1020I4NK
Manufacturer:
ALTERA
0
Timing Model
5–72
Stratix II Device Handbook, Volume 1
1.8-V LVTTL
3.3-V LVCMOS
1.5-V LVCMOS
SSTL-2 Class I
SSTL-2 Class II
SSTL-18 Class I
SSTL-18 Class II
1.2-V HSTL
1.5-V HSTL
Class I
1.8-V HSTL
Class I
1.8-V HSTL
Class II
Differential
SSTL-2 Class I
Differential
SSTL-2 Class II
Differential
SSTL-18 Class I
Differential
SSTL-18 Class II
1.8-V Differential
HSTL Class I
1.8-V Differential
HSTL Class II
1.5-V Differential
HSTL Class I
Table 5–78. Maximum Output Toggle Rate on Stratix II Devices (Part 4 of 5)
I/O Standard
(2)
OCT 50 Ω
OCT 50 Ω
OCT 50 Ω
OCT 50 Ω
OCT 25 Ω
OCT 50 Ω
OCT 25 Ω
OCT 50 Ω
OCT 50 Ω
OCT 50 Ω
OCT 25 Ω
OCT 50 Ω
OCT 25 Ω
OCT 50 Ω
OCT 25 Ω
OCT 50 Ω
OCT 25 Ω
OCT 50 Ω
Strength
Drive
Column I/O Pins (MHz)
700
350
550
600
600
560
550
280
600
650
500
600
600
560
550
650
500
600
-3
550
350
450
500
550
400
500
550
600
500
500
550
400
500
600
500
550
-4
-
450
300
400
500
500
350
450
500
600
450
500
500
350
450
600
450
500
-5
-
700
350
550
600
600
590
600
650
600
600
590
650
600
Row I/O Pins (MHz)
-3
-
-
-
-
-
550
350
450
500
550
400
550
600
500
550
400
600
550
-4
-
-
-
-
-
450
300
400
500
500
350
500
600
500
500
350
600
500
-5
-
-
-
-
-
Note (1)
Clock Outputs (MHz)
700
350
550
600
600
450
550
280
600
650
500
600
600
560
550
650
500
600
-3
Altera Corporation
550
350
450
500
550
400
500
550
600
500
500
550
400
500
600
500
550
-4
-
April 2011
450
300
400
500
500
350
450
500
600
450
500
500
350
450
600
450
500
-5
-

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