XC3S250E-4FTG256C Xilinx Inc, XC3S250E-4FTG256C Datasheet - Page 179

• Manufacturer Part Number: XC3S250E-4FTG256C
• Description: IC SPARTAN-3E FPGA 250K 256-FTBG
• Manufacturer: Xilinx Inc
• Series: Spartan™-3Er

Specifications of XC3S250E-4FTG256C

• Total Ram Bits: 221184
• Number Of Logic Elements/cells: 5508
• Number Of Labs/clbs: 612
• Number Of I /o: 172
• Number Of Gates: 250000
• Voltage - Supply: 1.14 V ~ 1.26 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 256-LBGA
• No. Of Logic Blocks: 5508
• No. Of Gates: 250000
• No. Of Macrocells: 5508
• No. Of Speed Grades: 4
• No. Of I/o's: 190
• Clock Management: DLL
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 122-1482

CP132 Footprint
DS312-4 (v3.8) August 26, 2009
Product Specification
0 to 2
16 to
22
2
9
G
M
A
B
C
D
E
H
K
N
P
F
J
L
I/O: Unrestricted,
general-purpose user I/O
INPUT: Unrestricted,
general-purpose input pin
CONFIG: Dedicated
configuration pins
N.C.: Unconnected balls on
the XC3S100E FPGA ( )
PROG_B
VCCAUX
VCCO_3
LHCLK3
L01N_3
L03N_3
LHCLK2
LHCLK5
L09N_3
L01N_2
L05P_3
L05N_3
L06N_3
L08P_3
L02P_2
INIT_B
R
IRDY2
DOUT
BUSY
GND
GND
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
1
VCCINT
VCCINT
VREF_3
VCCO_3
L02N_3
LHCLK6
L08N_3
L02N_2
L01P_3
L03P_3
INPUT
L04N_3
LHCLK1
L07P_3
L01P_2
CSO_B
CSI_B
MOSI
GND
TDI
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
2
VCCINT
VCCO_2
HSWAP
LHCLK0
LHCLK4
VREF_3
VREF_2
L11P_0
L11N_0
L02P_3
L04P_3
L06P_3
L07N_3
LHCLK7
L09P_3
TRDY2
INPUT
GND
GND
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
3
GCLK12
GCLK13
L10P_0
L10N_0
L03P_2
L03N_2
GND
I/O
I/O
I/O
I/O
I/O
D7
D6
D5
4
Figure 82: CP132 Package Footprint (top view)
VCCAUX
GCLK14
GCLK15
L09P_0
L09N_0
L04P_2
L04N_2
GND
I/O
I/O
I/O
I/O
D4
D3
42 to
5
16
16
46
4
RDWR_B
VCCO_0
VREF_0
L08N_0
L05N_2
L08P_0
INPUT
L05P_2
INPUT
GCLK1
L06P_2
GCLK0
GCLK2
I/O
I/O
I/O
M2
D2
6
DUAL: Configuration pin, then
possible user I/O
CLK: User I/O, input, or global
buffer input
JTAG: Dedicated JTAG port
pins
GND: Ground
Bank 2
www.xilinx.com
GCLK10
GCLK11
L07P_0
L07N_0
L06N_2
GCLK3
GND
GND
I/O
I/O
I/O
I/O
M1
D1
7
Bank 0
VCCO_2
L06P_0
L06N_0
L07N_2
L07P_2
INPUT
INPUT
GCLK9
GCLK8
GND
I/O
DIN
I/O
M0
D0
8
VCCAUX
L05N_0
L05P_0
L04N_0
L08N_2
L08P_2
GCLK7
GCLK6
GCLK5
A22
A23
I/O
I/O
I/O
I/O
I/O
9
VCCO_0
L09N_2
L04P_0
L09P_2
GCLK4
GND
GND
A20
A21
10
I/O
I/O
I/O
VCCINT
7 to 8
VREF_0
L03N_0
L03P_0
L10N_2
L10P_2
VREF_2
VS1
VS2
I/O
I/O
A18
A19
I/O
11
I/O
I/O
8
6
4
VCCINT
VCCAUX
RHCLK5
RHCLK1
VREF_1
L02N_0
L02P_0
L01N_0
L09N_1
L06N_1
L04N_1
L02P_1
L11N_2
L11P_2
INPUT
VREF: User I/O or input
voltage reference for bank
VCCO: Output voltage supply
for bank
VCCINT: Internal core supply
voltage (+1.2V)
VCCAUX: Auxiliary supply
voltage (+2.5V)
GND
CCLK
LDC0
VS0
I/O
I/O
I/O
I/O
A14
I/O
A17
12
I/O
I/O
I/O
I/O
I/O
A0
A5
A9
VCCO_1
RHCLK7
RHCLK4
RHCLK2
VREF_1
L01P_0
L10N_1
L09P_1
L08N_1
L07N_1
L06P_1
L05P_1
L03P_1
L02N_1
L01P_1
DONE
IRDY1
LDC2
HDC
TCK
A12
A13
A16
13
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
A1
A3
A6
A8
Pinout Descriptions
VCCINT
VCCO_1
RHCLK6
RHCLK3
RHCLK0
DS312-4_07_030206
L03N_1
L01N_1
L10P_1
L08P_1
L07P_1
L05N_1
L04P_1
TRDY1
LDC1
GND
GND
GND
TMS
A10
A11
A15
14
TDO
I/O
I/O
I/O
I/O
I/O
I/O
I/O
A2
A
A
4
7
179