EP3C16F484C8N Altera, EP3C16F484C8N Datasheet - Page 129
![IC CYCLONE III FPGA 16K 484FBGA](/photos/6/72/67258/544-484-fbga_sml.jpg)
EP3C16F484C8N
Manufacturer Part Number
EP3C16F484C8N
Description
IC CYCLONE III FPGA 16K 484FBGA
Manufacturer
Altera
Series
Cyclone® IIIr
Datasheets
1.EP3C5F256C8N.pdf
(5 pages)
2.EP3C5F256C8N.pdf
(34 pages)
3.EP3C5F256C8N.pdf
(66 pages)
4.EP3C5F256C8N.pdf
(14 pages)
5.EP3C5F256C8N.pdf
(76 pages)
6.EP3C10M164C8N.pdf
(350 pages)
7.EP3C16F484C8N.pdf
(274 pages)
Specifications of EP3C16F484C8N
Number Of Logic Elements/cells
15408
Number Of Labs/clbs
963
Total Ram Bits
516096
Number Of I /o
346
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
484-FBGA
Family Name
Cyclone III
Number Of Logic Blocks/elements
15408
# I/os (max)
346
Frequency (max)
402MHz
Process Technology
65nm
Operating Supply Voltage (typ)
1.2V
Logic Cells
15408
Ram Bits
516096
Operating Supply Voltage (min)
1.15V
Operating Supply Voltage (max)
1.25V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
484
Package Type
FBGA
No. Of Logic Blocks
963
Family Type
Cyclone III
No. Of I/o's
346
I/o Supply Voltage
3.3V
Operating Frequency Max
402MHz
Operating Temperature Range
0°C To +85°C
Rohs Compliant
Yes
For Use With
544-2601 - KIT DEV CYCLONE III LS EP3CLS200P0037 - BOARD DEV/EDUCATION ALTERA DE0544-2411 - KIT DEV NIOS II CYCLONE III ED.
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Compliant
Other names
544-2474
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP3C16F484C8N
Manufacturer:
ALTERA
Quantity:
331
Company:
Part Number:
EP3C16F484C8N
Manufacturer:
ALTERA44
Quantity:
120
Part Number:
EP3C16F484C8N
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
Chapter 7: High-Speed Differential Interfaces in the Cyclone III Device Family
High-Speed I/O Interface
Table 7–2. Cyclone III Device Family Differential Channels (Part 2 of 2)
© December 2009
Notes to
(1) User I/O pins are used as inputs or outputs; clock input pins are used as inputs only; clock output pins are used as output only.
(2) For differential pad placement guidelines, refer to the
Cyclone III Device Family
Cyclone III LS Devices
Table
7–2:
Altera Corporation
Table 7–3
Cyclone III devices.
Table 7–3. Cyclone III Devices Migratable Differential Channels
Package
M164
Q240
Type
E144
F256
EP3CLS100
EP3CLS150
EP3CLS200
EP3CLS70
Device
lists the numbers of differential channels that can be migrated in
EP3C5 and EP3C10
EP3C5 and EP3C16
EP3C5 and EP3C25
EP3C10 and EP3C16
EP3C10 and EP3C25
EP3C16 and EP3C25
EP3C5 and EP3C10
EP3C5 and EP3C16
EP3C10 and EP3C16
EP3C16 and EP3C25
EP3C16 and EP3C40
EP3C25 and EP3C40
EP3C5 and EP3C10
EP3C5 and EP3C16
EP3C5 and EP3C25
EP3C10 and EP3C16
EP3C10 and EP3C25
EP3C16 and EP3C25
Migration Between Devices
Cyclone III Device I/O Features
Package
U484
U484
F484
F780
F484
F780
F484
F780
F484
F780
User I/O
101
101
169
101
101
169
169
169
75
75
Number of Differential Channels
chapter.
Clock Input
8
8
8
8
8
8
8
8
8
8
User I/O
16
22
11
19
23
11
12
62
39
40
39
40
33
5
6
5
6
5
(Note 1)
Cyclone III Device Handbook, Volume 1
Migratable Channels
Output
Clock
4
4
4
4
4
4
4
4
4
4
(Part 1 of 2)
CLK
4
4
4
4
4
8
4
4
4
8
8
8
4
4
4
4
4
8
(Note
1),
Total
(2)
113
181
113
113
181
181
181
113
Total
87
87
20
10
10
13
26
15
14
31
19
20
66
43
44
43
44
41
9
9
7–5