EP3C16F484C7N Altera, EP3C16F484C7N Datasheet - Page 145
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EP3C16F484C7N
Manufacturer Part Number
EP3C16F484C7N
Description
IC CYCLONE III FPGA 16K 484FBGA
Manufacturer
Altera
Series
Cyclone® IIIr
Datasheets
1.EP3C5F256C8N.pdf
(5 pages)
2.EP3C5F256C8N.pdf
(34 pages)
3.EP3C5F256C8N.pdf
(66 pages)
4.EP3C5F256C8N.pdf
(14 pages)
5.EP3C5F256C8N.pdf
(76 pages)
6.EP3C10M164C8N.pdf
(350 pages)
7.EP3C16F484C7N.pdf
(274 pages)
Specifications of EP3C16F484C7N
Number Of Logic Elements/cells
15408
Number Of Labs/clbs
963
Total Ram Bits
516096
Number Of I /o
346
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
484-FBGA
Family Name
Cyclone III
Number Of Logic Blocks/elements
15408
# I/os (max)
346
Frequency (max)
437.5MHz
Process Technology
65nm
Operating Supply Voltage (typ)
1.2V
Logic Cells
15408
Ram Bits
516096
Operating Supply Voltage (min)
1.15V
Operating Supply Voltage (max)
1.25V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
484
Package Type
FBGA
No. Of Logic Blocks
963
Family Type
Cyclone III
No. Of I/o's
346
I/o Supply Voltage
3.3V
Operating Frequency Max
437.5MHz
Operating Temperature Range
0°C To +85°C
Rohs Compliant
Yes
For Use With
544-2601 - KIT DEV CYCLONE III LS EP3CLS200P0037 - BOARD DEV/EDUCATION ALTERA DE0544-2411 - KIT DEV NIOS II CYCLONE III ED.
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Compliant
Other names
544-2473
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EP3C16F484C7N
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
Figure 8–1. Cyclone III Device Family External Memory Data Path
Note to
(1) All clocks shown here are global clocks.
© January 2010 Altera Corporation
CIII51009-2.3
Figure
8–1:
f
PLL
1
-90° Shifted Clock
OE
In addition to an abundant supply of on-chip memory, Cyclone
(Cyclone III and Cyclone III LS devices) can easily interface to a broad range of
external memory, including DDR2 SDRAM, DDR SDRAM, and QDRII SRAM.
External memory devices are an important system component of a wide range of
image processing, storage, communications, and general embedded applications.
Altera
interfaces using the Altera ALTMEMPHY megafunction. You can implement the
controller function using the Altera DDR2 or DDR SDRAM memory controllers,
third-party controllers, or a custom controller for unique application needs.
Cyclone III device family supports QDR II interfaces electrically, but Altera does not
supply controller or physical layer (PHY) megafunctions for QDR II interfaces.
This chapter includes a description of the hardware interfaces for external memory
interfaces available in Cyclone III device family.
This chapter contains the following sections:
■
■
For more information about external memory system performance specifications,
board design guidelines, timing analysis, simulation, and debugging information,
refer to
Figure 8–1
in Cyclone III device family.
Register
System Clock
IOE
Register
“Cyclone III Device Family Memory Interfaces Pin Support” on page 8–2
“Cyclone III Device Family Memory Interfaces Features” on page 8–10
IOE
®
GND
V CC
recommends that you construct all DDR2 or DDR SDRAM external memory
Literature: External Memory
Capture Clock
shows the block diagram of a typical external memory interface data path
Register
Register
IOE
IOE
DQS/CQ/CQn
8. External Memory Interfaces in the
OE
Register
IOE
Register
Interfaces.
IOE
(Note 1)
DataA
DataB
Register
Register
Cyclone III Device Family
IOE
IOE
DQ
Cyclone III Device Handbook, Volume 1
Register
Register
®
LE
LE
III device family
Register
LE