EP3C16F484C7N Altera, EP3C16F484C7N Datasheet - Page 241
![IC CYCLONE III FPGA 16K 484FBGA](/photos/6/72/67258/544-484-fbga_sml.jpg)
EP3C16F484C7N
Manufacturer Part Number
EP3C16F484C7N
Description
IC CYCLONE III FPGA 16K 484FBGA
Manufacturer
Altera
Series
Cyclone® IIIr
Datasheets
1.EP3C5F256C8N.pdf
(5 pages)
2.EP3C5F256C8N.pdf
(34 pages)
3.EP3C5F256C8N.pdf
(66 pages)
4.EP3C5F256C8N.pdf
(14 pages)
5.EP3C5F256C8N.pdf
(76 pages)
6.EP3C10M164C8N.pdf
(350 pages)
7.EP3C16F484C7N.pdf
(274 pages)
Specifications of EP3C16F484C7N
Number Of Logic Elements/cells
15408
Number Of Labs/clbs
963
Total Ram Bits
516096
Number Of I /o
346
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
484-FBGA
Family Name
Cyclone III
Number Of Logic Blocks/elements
15408
# I/os (max)
346
Frequency (max)
437.5MHz
Process Technology
65nm
Operating Supply Voltage (typ)
1.2V
Logic Cells
15408
Ram Bits
516096
Operating Supply Voltage (min)
1.15V
Operating Supply Voltage (max)
1.25V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
484
Package Type
FBGA
No. Of Logic Blocks
963
Family Type
Cyclone III
No. Of I/o's
346
I/o Supply Voltage
3.3V
Operating Frequency Max
437.5MHz
Operating Temperature Range
0°C To +85°C
Rohs Compliant
Yes
For Use With
544-2601 - KIT DEV CYCLONE III LS EP3CLS200P0037 - BOARD DEV/EDUCATION ALTERA DE0544-2411 - KIT DEV NIOS II CYCLONE III ED.
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Compliant
Other names
544-2473
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EP3C16F484C7N
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
Chapter 9: Configuration, Design Security, and Remote System Upgrades in the Cyclone III Device Family
Remote System Upgrade
© December 2009
1
Altera Corporation
After power up or a configuration error, the factory configuration logic writes the
remote system upgrade control register to specify the address of the application
configuration to be loaded. The factory configuration also specifies whether or not to
enable the user watchdog timer for the application configuration and, if enabled,
specifies the timer setting.
Only valid application configurations designed for remote update mode include the
logic to reset the timer in user mode. For more information about the user watchdog
timer, refer to
If there is an error while loading the application configuration, the remote system
upgrade status register is written by the dedicated remote system upgrade circuitry of
the Cyclone III device family, specifying the cause of the reconfiguration.
The following actions cause the remote system upgrade status register to be written:
■
■
■
■
Cyclone III device family automatically load the factory configuration located at
address boot_address[23:0] = 24'b0 for the AS configuration scheme, and
default address boot_address[23:0] = 24'h010000 (or the updated address if the default
address is changed) for the AP configuration scheme. This user-designed factory
configuration reads the remote system upgrade status register to determine the reason
for reconfiguration. Then the factory configuration takes the appropriate error
recovery steps and writes to the remote system upgrade control register to determine
the next application configuration to be loaded.
When Cyclone III device family successfully load the application configuration, the
devices enter user mode. In user mode, the soft logic (Nios II processor or state
machine and the remote communication interface) assists the Cyclone III device
family in determining when a remote system update is arriving. When a remote
system update arrives, the soft logic receives the incoming data, writes it to the
configuration memory device, and triggers the device to load the factory
configuration. The factory configuration reads the remote system upgrade status
register, determines the valid application configuration to load, writes the remote
system upgrade control register accordingly, and starts system reconfiguration.
nSTATUS driven low externally
Internal CRC error
User watchdog timer time-out
A configuration reset (logic array nCONFIG signal or external nCONFIG pin
assertion)
“User Watchdog Timer” on page
9–87.
Cyclone III Device Handbook, Volume 1
9–81