EP3C55F484I7 Altera, EP3C55F484I7 Datasheet - Page 22

IC CYCLONE III FPGA 55K 484 FBGA

EP3C55F484I7

Manufacturer Part Number
EP3C55F484I7
Description
IC CYCLONE III FPGA 55K 484 FBGA
Manufacturer
Altera
Series
Cyclone® IIIr

Specifications of EP3C55F484I7

Number Of Logic Elements/cells
55856
Number Of Labs/clbs
3491
Total Ram Bits
2396160
Number Of I /o
327
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
484-FBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-

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1–22
Cyclone III Device Handbook, Volume 2
Table 1–30. Cyclone III Devices Emulated LVDS Transmitter Timing Specifications
of 2)
Table 1–31. Cyclone III Devices LVDS Receiver Timing Specifications
TCCS
Output jitter
(peak to peak)
t
Notes to
(1) Emulated LVDS transmitter is supported at the output pin of all I/O banks.
(2) t
f
frequency)
HSIODR
SW
Input jitter
tolerance
t
Notes to
(1) LVDS receiver is supported at all banks.
(2) t
LOCK
HSC LK
LOCK
(2)
(2)
Symbol
Symbol
LOC K
(input clock
LOC K
Table
Table
is the time required for the PLL to lock from the end of device configuration.
is the time required for the PLL to lock from the end of device configuration.
1–30:
1–31:
Modes
Modes
×10
×10
×8
×7
×4
×2
×1
×8
×7
×4
×2
×1
Min
Min
100
10
10
10
10
10
10
80
70
40
20
10
C6
C6
437.5
437.5
437.5
437.5
437.5
437.5
437.5
Max
Max
875
875
875
875
875
400
500
200
500
1
1
Min
100
Min
10
10
10
10
10
10
80
70
40
20
10
C7, I7
C7, I7
Chapter 1: Cyclone III Device Data Sheet
402.5
402.5
Max
Max
370
370
370
370
370
740
740
740
740
740
400
500
200
500
1
1
© January 2010 Altera Corporation
(Note 1)
Min
Min
100
10
10
10
10
10
10
80
70
40
20
10
C8, A7
C8, A7
Switching Characteristics
(Note 1)
402.5
402.5
Max
Max
320
320
320
320
320
640
640
640
640
640
400
550
200
550
1
1
(Part 2
Mbps
Mbps
Mbps
Mbps
Mbps
Mbps
MHz
MHz
MHz
MHz
MHz
MHz
Unit
Unit
ms
ms
ps
ps
ps
ps

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