EP2S15F484C4 Altera, EP2S15F484C4 Datasheet - Page 162
![IC STRATIX II FPGA 15K 484-FBGA](/photos/6/72/67258/544-484-fbga_sml.jpg)
EP2S15F484C4
Manufacturer Part Number
EP2S15F484C4
Description
IC STRATIX II FPGA 15K 484-FBGA
Manufacturer
Altera
Series
Stratix® IIr
Datasheet
1.EP2S15F484I4N.pdf
(238 pages)
Specifications of EP2S15F484C4
Number Of Logic Elements/cells
15600
Number Of Labs/clbs
780
Total Ram Bits
419328
Number Of I /o
342
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
484-FBGA
Family Name
Stratix II
Number Of Logic Blocks/elements
15600
# I/os (max)
342
Frequency (max)
711.24MHz
Process Technology
90nm (CMOS)
Operating Supply Voltage (typ)
1.2V
Logic Cells
15600
Ram Bits
419328
Operating Supply Voltage (min)
1.15V
Operating Supply Voltage (max)
1.25V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
484
Package Type
FC-FBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Not Compliant
Other names
544-1104
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP2S15F484C4
Manufacturer:
ALTERA30
Quantity:
146
Part Number:
EP2S15F484C4
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
Company:
Part Number:
EP2S15F484C4N
Manufacturer:
ALTERA
Quantity:
325
Part Number:
EP2S15F484C4N
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
Timing Model
5–26
Stratix II Device Handbook, Volume 1
LVTTL
LVCMOS
2.5 V
1.8 V
1.5 V
PCI
PCI-X
SSTL-2 Class I
SSTL-2 Class II
SSTL-18 Class I
SSTL-18 Class II
1.8-V HSTL Class I
Table 5–35. Timing Measurement Methodology for Input Pins (Part 1 of 2)
(6)
(5)
(5)
(5)
(6)
(5)
(5)
I/O Standard
Figure 5–6. Measurement Setup for t
Table 5–35
Din
Din
OE
OE
specifies the input timing measurement setup.
V
CCIO
3.135
3.135
2.375
1.710
1.425
2.970
2.970
2.325
2.325
1.660
1.660
1.660
(V)
Measurement Conditions
t
t
1 MΩ
1 MΩ
ZX
ZX
V
, Tristate to Driving High
Dout
, Tristate to Driving Low
Dout
1.163
1.163
0.830
0.830
0.830
REF
(V)
zx
Dout
Dout
Din
Din
OE
OE
Edge Rate (ns)
Disable
Disable
3.135
3.135
2.375
1.710
1.425
2.970
2.970
2.325
2.325
1.660
1.660
1.660
Notes (1)–(4)
Enable
Enable
½ V
½ V
CCINT
CCINT
Measurement Point
t
t
zh
zl
Altera Corporation
V
M E A S
1.5675
1.5675
1.1875
0.7125
1.1625
1.1625
0.855
1.485
1.485
0.83
0.83
0.83
April 2011
(V)
½ V
½ V
“1”
“0”
CCIO
CCIO