EP2S15F672I4N Altera, EP2S15F672I4N Datasheet - Page 19
EP2S15F672I4N
Manufacturer Part Number
EP2S15F672I4N
Description
IC STRATIX II FPGA 15K 672-FBGA
Manufacturer
Altera
Series
Stratix® IIr
Datasheet
1.EP2S15F484I4N.pdf
(238 pages)
Specifications of EP2S15F672I4N
Number Of Logic Elements/cells
15600
Number Of Labs/clbs
780
Total Ram Bits
419328
Number Of I /o
366
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
672-FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
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Figure 2–7. ALM in Normal Mode
Note to
(1)
Altera Corporation
May 2007
datae0
datae1
datae0
datae1
datae0
datae1
dataf0
dataf1
dataf0
dataf1
dataf0
dataf1
dataa
datab
datad
datac
dataa
datab
datad
datac
dataa
datab
datad
datac
Combinations of functions with fewer inputs than those shown are also supported. For example, combinations of
functions with the following number of inputs are supported: 4 and 3, 3 and 3, 3 and 2, 5 and 2, etc.
Figure
2–7:
3-Input
LUT
4-Input
5-Input
5-Input
4-Input
4-Input
LUT
LUT
LUT
LUT
LUT
The normal mode provides complete backward compatibility with four-
input LUT architectures. Two independent functions of four inputs or less
can be implemented in one Stratix II ALM. In addition, a five-input
function and an independent three-input function can be implemented
without sharing inputs.
Note (1)
combout0
combout1
combout0
combout1
combout0
combout1
datae0
datae1
datae0
datae0
datae1
dataf0
dataf1
dataf0
dataf0
dataf1
dataa
datab
datad
dataa
datab
datad
dataa
datab
datad
datac
datac
datac
Stratix II Device Handbook, Volume 1
6-Input
6-Input
6-Input
5-Input
5-Input
LUT
LUT
LUT
LUT
LUT
Stratix II Architecture
combout0
combout1
combout0
combout0
combout1
2–11
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