EP1SGX25DF1020C6 Altera, EP1SGX25DF1020C6 Datasheet - Page 148
EP1SGX25DF1020C6
Manufacturer Part Number
EP1SGX25DF1020C6
Description
IC STRATIX GX FPGA 25K 1020-FBGA
Manufacturer
Altera
Series
Stratix® GXr
Datasheet
1.EP1SGX10CF672C7N.pdf
(272 pages)
Specifications of EP1SGX25DF1020C6
Number Of Logic Elements/cells
25660
Number Of Labs/clbs
2566
Total Ram Bits
1944576
Number Of I /o
607
Voltage - Supply
1.425 V ~ 1.575 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
1020-FBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP1SGX25DF1020C6
Manufacturer:
ALTERA
Quantity:
7
Company:
Part Number:
EP1SGX25DF1020C6
Manufacturer:
ALTERA
Quantity:
1 045
Company:
Part Number:
EP1SGX25DF1020C6N
Manufacturer:
ALTERA
Quantity:
3 000
- Current page: 148 of 272
- Download datasheet (3Mb)
PLLs & Clock Networks
Figure 4–51. Stratix GX Enhanced PLL
Notes to
(1)
(2)
(3)
4–82
Stratix GX Device Handbook, Volume 1
CLK0
CLK1
External feedback is available in PLLs 5 and 6.
This external output is available from the g0 counter for PLLs 11 and 12.
These counters and external outputs are available in PLLs 5 and 6.
Figure
Switch-Over
Circuitry
Clock
4–51:
FBIN
/n
(1)
Δt
Enhanced PLLs
Stratix GX devices contain up to four enhanced PLLs with advanced
clock management features.
enhanced PLL.
Phase Frequency
Detector
PFD
Charge
Pump
VCO Phase Selection
Selectable at Each
PLL Output Port
Lock Detect
& Filter
VCO Phase Selection
Affecting All Outputs
Spectrum
Δt
Spread
Filter
Loop
/m
From Adjacent PLL
VCO
Figure 4–51
8
Post-Scale
Counters
shows a diagram of the
/g0
/g1
/g2
/g3
/e0
/e1
/e2
/e3
/l0
/l1
Δt
Δt
Δt
Δt
Δt
Δt
Δt
Δt
Δt
Δt
Programmable
Time Delay on
Each PLL Port
4
4
Altera Corporation
February 2005
I/O Buffers (2)
to I/O or general
routing
Regional
Clocks
Global
Clocks
I/O Buffers (3)
Related parts for EP1SGX25DF1020C6
Image
Part Number
Description
Manufacturer
Datasheet
Request
R
Part Number:
Description:
Stratix Gx Device Family Data Sheet
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
CYCLONE II STARTER KIT EP2C20N
Manufacturer:
Altera
Datasheet:
Part Number:
Description:
CPLD, EP610 Family, ECMOS Process, 300 Gates, 16 Macro Cells, 16 Reg., 16 User I/Os, 5V Supply, 35 Speed Grade, 24DIP
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
CPLD, EP610 Family, ECMOS Process, 300 Gates, 16 Macro Cells, 16 Reg., 16 User I/Os, 5V Supply, 15 Speed Grade, 24DIP
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
CPLD, EP610 Family, ECMOS Process, 300 Gates, 16 Macro Cells, 16 Reg., 16 User I/Os, 5V Supply, 30 Speed Grade, 24DIP
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
High-performance, low-power erasable programmable logic devices with 8 macrocells, 10ns
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
High-performance, low-power erasable programmable logic devices with 8 macrocells, 7ns
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
Classic EPLD
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
High-performance, low-power erasable programmable logic devices with 8 macrocells, 10ns
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
Manufacturer:
Altera Corporation
Datasheet: