EP1S25F1020C5 Altera, EP1S25F1020C5 Datasheet - Page 100
EP1S25F1020C5
Manufacturer Part Number
EP1S25F1020C5
Description
IC STRATIX FPGA 25K LE 1020-FBGA
Manufacturer
Altera
Series
Stratix®r
Datasheet
1.EP1S10F780C7.pdf
(276 pages)
Specifications of EP1S25F1020C5
Number Of Logic Elements/cells
25660
Number Of Labs/clbs
2566
Total Ram Bits
1944576
Number Of I /o
706
Voltage - Supply
1.425 V ~ 1.575 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
1020-FBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
Other names
544-1857
EP1S25F1020C5
EP1S25F1020C5
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EP1S25F1020C5N
Manufacturer:
ALTERA
Quantity:
20 000
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PLLs & Clock Networks
Figure 2–51. Global & Regional Clock Connections from Top Clock Pins & Enhanced PLL Outputs
Notes to
(1)
(2)
(3)
(4)
2–86
Stratix Device Handbook, Volume 1
PLLs 1 to 4 and 7 to 10 are fast PLLs. PLLs 5, 6, 11, and 12 are enhanced PLLs.
CLK4, CLK6, CLK12, and CLK14 feed the corresponding PLL’s inclk0 port.
CLK5, CLK7, CLK13, and CLK15 feed the corresponding PLL’s inclk1 port.
The EP1S40 device in the 780-pin FineLine BGA package does not support PLLs 11 and 12.
Figure
Regional
Regional
Clocks
Clocks
2–51:
Clocks
Global
RCLK2
RCLK3
RCLK6
RCLK7
L0 L1 G0 G1 G2 G3
L0 L1 G0 G1 G2 G3
E[0..3]
PLL 6
PLL 5
(1)
(2)
(2)
(1)
G0 G1 G2 G3 L0 L1
G0 G1 G2 G3 L0 L1
(1)
PLL 11
(1)
PLL 12
(2)
(2)
RCLK10
RCLK11
G12
G13
G14
G15
G4
G5
G6
G7
RCLK12
RCLK13
Altera Corporation
Note (1)
July 2005
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