EP1S30F780I6N Altera, EP1S30F780I6N Datasheet - Page 256

• Manufacturer Part Number: EP1S30F780I6N
• Description: IC STRATIX FPGA 30K LE 780-FBGA
• Manufacturer: Altera
• Series: Stratix®r

Specifications of EP1S30F780I6N

• Number Of Logic Elements/cells: 32470
• Number Of Labs/clbs: 3247
• Total Ram Bits: 3317184
• Number Of I /o: 597
• Voltage - Supply: 1.425 V ~ 1.575 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 780-FBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -

Timing Model
4–86
Stratix Device Handbook, Volume 1
Notes to
(1)
(2)
(3)
(4)
(5)
(6)
LVDS
HyperTransport
technology
Table 4–123. Stratix Maximum Output Clock Rate (Using I/O Pins) for PLL[1,
2, 3, 4] Pins in Wire-Bond Packages (Part 2 of 2)
Differential SSTL-2 outputs are only available on column clock pins.
These parameters are only available on row I/O pins.
SSTL-2 in maximum drive strength condition. See
more information on exact loading conditions for each I/O standard.
SSTL-2 in minimum drive strength with
SSTL-2 in minimum drive strength with > 10pF output load condition.
Differential SSTL-2 outputs are only supported on column clock pins.
I/O Standard
(2)
Tables 4–120
(2)
through 4–123:
-6 Speed
Grade
400
420
-7 Speed
Grade
311
400
≤
10pF output load condition.
-8 Speed
Grade
Table 4–101 on page 4–62
311
400
Altera Corporation
January 2006
MHz
MHz
Unit
for