EP1SGX40DF1020C6N Altera, EP1SGX40DF1020C6N Datasheet - Page 81
EP1SGX40DF1020C6N
Manufacturer Part Number
EP1SGX40DF1020C6N
Description
IC STRATIX GX FPGA 40K 1020-FBGA
Manufacturer
Altera
Series
Stratix® GXr
Datasheet
1.EP1SGX10CF672C7N.pdf
(272 pages)
Specifications of EP1SGX40DF1020C6N
Number Of Logic Elements/cells
41250
Number Of Labs/clbs
4125
Total Ram Bits
3423744
Number Of I /o
624
Voltage - Supply
1.425 V ~ 1.575 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
1020-FBGA
Family Name
Stratix GX
Number Of Logic Blocks/elements
41250
# I/os (max)
624
Frequency (max)
5GHz
Process Technology
SRAM
Operating Supply Voltage (typ)
1.5V
Logic Cells
41250
Ram Bits
3423744
Operating Supply Voltage (min)
1.425V
Operating Supply Voltage (max)
1.575V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
1020
Package Type
FC-FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EP1SGX40DF1020C6N
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
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Figure 4–10. C4 Interconnect Connections
Note to
(1)
Altera Corporation
February 2005
Each C4 interconnect can drive either up or down four rows.
Figure
Adjacent LAB can
drive onto neighboring
LAB's C4 interconnect
4–10:
Row
Interconnect
C8 interconnects span eight LABs, M512, or M4K blocks up or down from
a source LAB. Every LAB has its own set of C8 interconnects to drive
either up or down. C8 interconnect connections between the LABs in a
column are similar to the C4 connections shown in
exception that they connect to eight LABs above and below. The C8
Interconnect
Local
Note (1)
Stratix GX Device Handbook, Volume 1
C4 Interconnect
Driving Down
Stratix GX Architecture
Figure 4–10
C4 Interconnect
Drives Local and R4
Interconnects
up to Four Rows
C4 Interconnect
Driving Up
LAB
with the
4–15
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