XC3SD1800A-5CS484C Xilinx Inc, XC3SD1800A-5CS484C Datasheet - Page 13
![SPARTAN-3ADSP FPGA 1800K 484CSA](/photos/6/73/67348/pk223-cs484_sml.jpg)
XC3SD1800A-5CS484C
Manufacturer Part Number
XC3SD1800A-5CS484C
Description
SPARTAN-3ADSP FPGA 1800K 484CSA
Manufacturer
Xilinx Inc
Series
Spartan™-3A DSPr
Datasheets
1.XC3S50A-4VQG100C.pdf
(7 pages)
2.XC3SD3400A-4FGG676C.pdf
(4 pages)
3.XC3SD3400A-4FGG676C.pdf
(101 pages)
Specifications of XC3SD1800A-5CS484C
Number Of Logic Elements/cells
37440
Number Of Labs/clbs
4160
Total Ram Bits
1548288
Number Of I /o
309
Number Of Gates
1800000
Voltage - Supply
1.14 V ~ 1.26 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
484-FBGA, CSPBGA
For Use With
122-1574 - KIT DEVELOPMENT SPARTAN 3ADSP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
XC3SD1800A-5CS484C
Manufacturer:
XILINX
Quantity:
648
Part Number:
XC3SD1800A-5CS484C
Manufacturer:
XILINX/赛灵思
Quantity:
20 000
Quiescent Current Requirements
Table 9: Quiescent Supply Current Characteristics
DS610 (v3.0) October 4, 2010
Product Specification
Notes:
1.
2.
3.
4.
5.
Symbol
I
I
CCAUXQ
CCINTQ
I
CCOQ
The numbers in this table are based on the conditions set forth in
Quiescent supply current is measured with all I/O drivers in a high-impedance state and with all pull-up/pull-down resistors at the I/O pads
disabled. Typical values are characterized using typical devices at room temperature (T
= 2.5V). The maximum limits are tested for each device at the respective maximum specified junction temperature and at maximum voltage
limits with V
with no functional elements instantiated). For conditions other than those described above (for example, a design including functional
elements), measured quiescent current levels will be different than the values in the table.
For more accurate estimates for a specific design, use the Xilinx XPower tools. There are two recommended ways to estimate the total power
consumption (quiescent plus dynamic) for a specific design: a) The
typical estimates, and does not require a netlist of the design. b) XPower Analyzer uses a netlist as input to provide maximum estimates as
well as more accurate typical estimates.
The maximum numbers in this table indicate the minimum current each power rail requires in order for the FPGA to power-on successfully.
For information on the power-saving Suspend mode, see XAPP480: Using Suspend Mode in Spartan-3 Generation FPGAs. Suspend mode
typically saves 40% total power consumption compared to quiescent current.
Quiescent V
Quiescent V
Quiescent V
CCINT
= 1.26V, V
Description
CCINT
CCO
CCAUX
supply current
supply current
supply current
CCO
= 3.6V, and V
CCAUX
XC3SD1800A
XC3SD3400A
XC3SD1800A
XC3SD3400A
XC3SD1800A
XC3SD3400A
Device
= 3.6V. The FPGA is programmed with a “blank” configuration data file (that is, a design
Spartan-3A DSP FPGA Family: DC and Switching Characteristics
www.xilinx.com
(1)
Power
Table
C,I
C,I
C,I
C,I
C,I
C,I
Spartan-3A DSP FPGA XPower Estimator
LI
LI
LI
LI
LI
LI
7.
Typical
0.4
0.2
0.4
0.2
41
36
64
55
25
24
39
38
(2)
J
of 25°C at V
Commercial
Maximum
390
550
130
90
–
–
4
–
4
–
–
–
CCINT
(2)
= 1.2V, V
provides quick, approximate,
Maximum
Industrial
CCO
500
175
725
300
110
160
105
72
5
5
5
5
= 3.3V, and V
(2)
Units
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
CCAUX
13