XC5VLX50T-2FFG665I Xilinx Inc, XC5VLX50T-2FFG665I Datasheet - Page 249

• Manufacturer Part Number: XC5VLX50T-2FFG665I
• Description: IC FPGA VIRTEX-5 50K 665FCBGA
• Manufacturer: Xilinx Inc
• Series: Virtex™-5 LXTr

Specifications of XC5VLX50T-2FFG665I

• Number Of Logic Elements/cells: 46080
• Number Of Labs/clbs: 3600
• Total Ram Bits: 2211840
• Number Of I /o: 360
• Voltage - Supply: 0.95 V ~ 1.05 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 665-BBGA, FCBGA
• For Use With: HW-V5-ML561-UNI-G - EVALUATION PLATFORM VIRTEX-5HW-V5-ML550-UNI-G - EVALUATION PLATFORM VIRTEX-5HW-V5-ML521-UNI-G - EVALUATION PLATFORM VIRTEX-5HW-V5GBE-DK-UNI-G - KIT DEV V5 LXT GIGABIT ETHERNET122-1508 - EVALUATION PLATFORM VIRTEX-5
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -

Virtex-5 FPGA User Guide
UG190 (v5.3) May 17, 2010
GTLP (Gunning Transceiver Logic Plus)
GTLP_DCI Usage
Table 6-13: GTL DC Voltage Specifications (Continued)
The Gunning Transceiver Logic Plus, or GTL+ standard is a high-speed bus standard
(JESD8.3) first used by the Pentium Pro Processor. This standard requires a differential
amplifier input buffer and a open-drain output buffer. The negative terminal of the
differential input buffer is referenced to the V
A sample circuit illustrating a valid termination technique for GTL+ with external parallel
termination and unconnected V
X-Ref Target - Figure 6-38
GTL+ does not require a V
to 1.5V. GTLP_DCI provides single termination to V
A sample circuit illustrating a valid termination technique for GTLP_DCI with internal
parallel driver and receiver termination is shown in
X-Ref Target - Figure 6-39
Notes:
1. N must be greater than or equal to 0.653 and less than or equal to 0.68.
V
V
I
I
I
OH
OL
OL
CCO
OL
Figure 6-38: GTL+ with External Parallel Termination and Unconnected V
at V
at V
at V
Figure 6-39: GTLP_DCI Internal Parallel Driver and Receiver Termination
= Unconnected
OL
OL
OH
Parameter
(mA) at 0.4V
(mA) at 0.2V
(mA)
V
50Ω
IOB
CCO
= 1.5V
R
P
= Z 0 = 50Ω
www.xilinx.com
IOB
CCO
V
TT
voltage. However, for GTLP_DCI, V
CCO
= 1.5V
is shown in
Z 0 = 50
Specific Guidelines for I/O Supported Standards
Z 0 = 50
Min
32
–
–
-
V
TT
REF
= 1.5V
Figure
pin.
R
P
CCO
IOB
Figure
= Z 0 = 50Ω
V
REF
6-38.
for inputs or outputs.
Typ
V
0.2
–
–
–
CCO
= 1.0V
6-39.
= 1.5V
V
IOB
R VRP = Z 0 = 50Ω
REF
CCO
= 1.0V
ug190_6_37_030206
+
–
must be connected
Max
0.4
40
–
–
–
+
ug190_6_36_030206
CCO
249