XC5VLX50T-3FFG665C Xilinx Inc, XC5VLX50T-3FFG665C Datasheet - Page 56

IC FPGA VIRTEX-5 50K 665FCBGA

XC5VLX50T-3FFG665C

Manufacturer Part Number
XC5VLX50T-3FFG665C
Description
IC FPGA VIRTEX-5 50K 665FCBGA
Manufacturer
Xilinx Inc
Series
Virtex™-5 LXTr

Specifications of XC5VLX50T-3FFG665C

Number Of Logic Elements/cells
46080
Number Of Labs/clbs
3600
Total Ram Bits
2211840
Number Of I /o
360
Voltage - Supply
0.95 V ~ 1.05 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
665-BBGA, FCBGA
For Use With
HW-V5-ML561-UNI-G - EVALUATION PLATFORM VIRTEX-5HW-V5-ML550-UNI-G - EVALUATION PLATFORM VIRTEX-5HW-V5-ML521-UNI-G - EVALUATION PLATFORM VIRTEX-5HW-V5GBE-DK-UNI-G - KIT DEV V5 LXT GIGABIT ETHERNET122-1508 - EVALUATION PLATFORM VIRTEX-5
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-

Available stocks

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Part Number:
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Quantity:
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Table 75: PLL in PMCD Mode Switching Characteristics
DS202 (v5.3) May 5, 2010
Product Specification
T
T
CLKIN_FREQ_MAX
CLKIN_FREQ_MIN
CLKIN_DUTY_CYCLE
RES_REL_PULSE_MIN
PLLCCK_REL
PLLCCKO
Symbol
/T
PLLCKC_REL
REL Setup and Hold for all Outputs
Maximum Clock Propagation Delay
Maximum Input Frequency
Minimum Input Frequency
Allowable Input Duty Cycle: 1—49 MHz
Allowable Input Duty Cycle: 50—199 MHz
Allowable Input Duty Cycle: 200—399 MHz
Allowable Input Duty Cycle: 400—499 MHz
Allowable Input Duty Cycle: >500 MHz
Minimum Pulse Width for RST and REL
Description
www.xilinx.com
Virtex-5 FPGA Data Sheet: DC and Switching Characteristics
0.00
0.60
710
4.6
-3
1
5
Speed Grade
25/75
30/70
35/65
40/60
45/55
0.00
0.60
710
4.6
-2
1
5
0.00
0.60
645
5.2
-1
1
5
Units
MHz
MHz
ns
ns
ns
%
%
%
%
%
56

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