XC4VFX60-10FFG1152C Xilinx Inc, XC4VFX60-10FFG1152C Datasheet - Page 11

IC FPGA VIRTEX-4 FX 60K 1152FBGA

XC4VFX60-10FFG1152C

Manufacturer Part Number
XC4VFX60-10FFG1152C
Description
IC FPGA VIRTEX-4 FX 60K 1152FBGA
Manufacturer
Xilinx Inc
Series
Virtex™-4r

Specifications of XC4VFX60-10FFG1152C

Total Ram Bits
4276224
Number Of Logic Elements/cells
56880
Number Of Labs/clbs
6320
Number Of I /o
576
Voltage - Supply
1.14 V ~ 1.26 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
1152-BBGA, FCBGA
No. Of Logic Blocks
6656
No. Of Macrocells
56880
Family Type
Virtex-4
No. Of Speed Grades
10
No. Of I/o's
576
Clock Management
DCM
Core Supply
RoHS Compliant
Package
1152FCBGA
Family Name
Virtex®-4
Device Logic Units
56880
Typical Operating Supply Voltage
1.2 V
Maximum Number Of User I/os
576
Ram Bits
4276224
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
HW-V4-ML410-UNI-G - EVALUATION PLATFORM VIRTEX-4
Number Of Gates
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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0
RocketIO DC Input and Output Levels
Table 12
tions of the Virtex-4 FPGA RocketIO Multi-Gigabit Serial
Transceivers.
Table 12: RocketIO DC Specifications
DS302 (v3.7) September 9, 2009
Product Specification
Notes:
1.
2.
3.
Peak-to-Peak Differential Input Voltage
Single-Ended Input Range
Common Mode Input Voltage Range
Single-Ended Output Voltage Swing
Common Mode Output Voltage Range
Peak-to-Peak Differential Output Voltage
Signal detect threshold
Electrical idle amplitude
RocketIO MGT Clock DC Input Levels
Peak-to-Peak Differential Input Voltage
Differential Input Resistance
The maximum V
The output swing and pre-emphasis levels are selected using the attributes discussed in Chapter 4: PMA Analog Considerations in the
RocketIO Multi-Gigabit Transceiver User Guide
V
+V
–V
TTX
+V
0
0
is 1.5 ± 5%; different amplitudes possible with adjusted DAC values.
summarizes the DC input and output specifica-
TXP–TXN
Figure 1
TXP
TXN
DC Parameter
TRX
is 1.26V when bypassing the internal AC coupled V
shows the single-ended output volt-
(2, 3)
Figure 2: Peak-to-Peak Differential Output Voltage
(3)
Figure 1: Single-Ended Output Voltage Swing
(2, 3)
for details.
RXOOB
TXOOB
DV
Symbol
SE
V
V
V
DV
V
PPOUT
R
IDIFF
OUT
TCM
ICM
IN
VIN
IN
VDPP
VDPP
www.xilinx.com
Virtex-4 FPGA Data Sheet: DC and Switching Characteristics
Internal AC Coupled
Internal AC Coupled
Internal AC Coupled
Bypassed Internal AC
Coupled
RX
TX
2
x
ICM
| V
age swing.
put voltage. Consult the
Transceiver User Guide
. V
MGTCLKP
TRX
Conditions
(1)
must be less than or equal to AVCCAUXRX.
– V
Figure 2
MGTCKLN
shows the peak-to-peak differential out-
|
for further details.
Min
110
100
450
900
100
71
Virtex-4 RocketIO Multi-Gigabit
0
1000
1050
Typ
TBD
800
600
105
65
V
TRX
2400
V
1400
2000
Max
725
124
DS302_03_031708
TRX
DS302_02_031708
DV
– 100
DV
PPOUT
Virtex-4
OUT
Units
mV
mV
mV
mV
mV
mV
mV
mV
mV
Ω
11

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