XC4VFX60-10FFG1152C Xilinx Inc, XC4VFX60-10FFG1152C Datasheet - Page 15

• Manufacturer Part Number: XC4VFX60-10FFG1152C
• Description: IC FPGA VIRTEX-4 FX 60K 1152FBGA
• Manufacturer: Xilinx Inc
• Series: Virtex™-4r

Specifications of XC4VFX60-10FFG1152C

• Total Ram Bits: 4276224
• Number Of Logic Elements/cells: 56880
• Number Of Labs/clbs: 6320
• Number Of I /o: 576
• Voltage - Supply: 1.14 V ~ 1.26 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 1152-BBGA, FCBGA
• No. Of Logic Blocks: 6656
• No. Of Macrocells: 56880
• Family Type: Virtex-4
• No. Of Speed Grades: 10
• No. Of I/o's: 576
• Clock Management: DCM
• Core Supply: RoHS Compliant
• Package: 1152FCBGA
• Family Name: Virtex®-4
• Device Logic Units: 56880
• Typical Operating Supply Voltage: 1.2 V
• Maximum Number Of User I/os: 576
• Ram Bits: 4276224
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: HW-V4-ML410-UNI-G - EVALUATION PLATFORM VIRTEX-4
• Number Of Gates: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 19: PowerPC 405 Data-Side On-Chip Memory Switching Characteristics
Table 20: PowerPC 405 Instruction-Side On-Chip Memory Switching Characteristics
Table 21: Processor Block DCR Bus Switching Characteristics
DS302 (v3.7) September 9, 2009
Product Specification
Setup and Hold Relative to Clock (BRAMDSOCMCLK)
Clock to Out
Setup and Hold Relative to Clock (BRAMISOCMCLK)
Clock to Out
Setup and Hold Relative to Clock (CPMDCRCLOCK)
Clock to Out
Data-Side On-Chip Memory data bus inputs
Data-Side On-Chip Memory control outputs
Data-Side On-Chip Memory address bus outputs T
Data-Side On-Chip Memory data bus outputs
Instruction-Side On-Chip Memory data bus inputs
Instruction-Side On-Chip Memory control outputs
Instruction-Side On-Chip Memory address bus outputs T
Instruction-Side On-Chip Memory data bus outputs
Device Control Register Bus control inputs
Device Control Register Bus data inputs
Device Control Register Bus control outputs
Device Control Register Bus address bus outputs
Device Control Register Bus data bus outputs
Description
Description
Description
T
T
T
T
PPCDCK
PPCCKD
PPCCKO
PPCCKO
PPCCKO
T
T
T
T
T
T
T
PPCDCK
PPCCKD
PPCDCK
PPCCKD
PPCCKO
PPCCKO
PPCCKO
T
T
T
T
www.xilinx.com
PPCDCK
PPCCKD
PPCCKO
PPCCKO
PPCCKO
Virtex-4 FPGA Data Sheet: DC and Switching Characteristics
_DSOCMRDDB
_DSOCMRDDB
_BRAMBWR
_BRAMABUS
_IBRAMWRDBUS01
Symbol
_EXDCRACK
_EXDCRACK
_EXDCRDBUSI
_EXDCRDBUSI
_EXDCRRD
_EXDCRABUS
_EXDCRDBUSO
Symbol
_ISOCMRDDB
_ISOCMRDDB
_IBRAMEN
_IBRAMRDABUS
_IBRAMWRDBUS
Symbol
0.12
0.15
0.57
0.16
1.20
1.28
1.31
-12
0.74
0.20
3.04
1.67
1.67
0.60
0.20
2.07
2.07
1.61
-12
-12
Speed Grade
Speed Grade
Speed Grade
0.13
0.17
0.57
0.16
1.35
1.45
1.45
-11
0.82
0.20
3.37
1.85
1.86
0.65
0.20
2.30
2.30
1.79
-11
-11
0.15
0.19
1.02
0.27
1.54
1.66
1.67
-10
0.94
0.23
3.88
2.13
2.14
0.74
0.23
2.65
2.65
2.06
-10
-10
ns, Max
ns, Max
ns, Max
ns, Max
ns, Max
ns, Max
ns, Min
ns, Min
ns, Max
ns, Max
ns, Max
ns, Min
ns, Min
Units
Units
Units
15